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ATWILC3000 データシート(PDF) 12 Page - ATMEL Corporation

部品番号 ATWILC3000
部品情報  Single Chip IEEE 802.11 b/g/n Link Controller withIntegrated Bluetooth 4.0
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATWILC3000 データシート(HTML) 12 Page - ATMEL Corporation

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ATWILC3000 Single Chip IEEE 802.11 b/g/n Link Controller with
Integrated Bluetooth 4.0 [DATASHEET]
Atmel-42390D-ATWILC3000-MUT-SmartConnect-Datasheet_05/2016
1
2
12
5
Clocking
5.1
Crystal Oscillator
Table 5-1.
Crystal Oscillator Parameters
Parameter
Min.
Typ.
Max.
Unit
Crystal Resonant Frequency
14
26
40
MHz
Crystal Equivalent Series Resistance
50
150
Stability
– Initial Offset (1)
-100
100
ppm
Stability - Temperature and Aging
-20
20
Initial offset must be calibrated to maintain ±20ppm in all operating conditions when including temperature
and aging. This calibration is performed during final production testing.
The block diagram in Figure 5-1(a) shows how the internal Crystal Oscillator (XO) is connected to the external
crystal. The XO has 5pF internal capacitance on each terminal XO_P and XO_N. To bypass the crystal
oscillator with an external reference, an external signal capable of driving 5pF can be applied to the XO_N
terminal as shown in Figure 5-1(b).
Figure 5-1.
XO Connections
ATWILC3000
XO_N
XO_P
(a)
ATWILC3000
XO_N
XO_P
(b)
External Clock
(a) Crystal Oscillator is used
(b) Crystal Oscillator is bypassed
Below are the electrical and performance requirements for the external clock.
Table 5-2.
Bypass Clock Specification
Parameter
Min.
Max.
Unit
Comments
Oscillation frequency
12
40
MHz
Must be able to drive 5pF load @
desired frequency
Voltage swing
0.5
1.2
Vpp
Must be AC coupled
Stability
– Temperature and Aging
-20
+20
ppm
Phase Noise
-130
dBc/Hz
At 10kHz offset
Jitter(RMS)
<1psec
Based on integrated phase noise
spectrum from 1kHz to 1MHz


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