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MC100EP51DT データシート(PDF) 5 Page - ON Semiconductor

部品番号 MC100EP51DT
部品情報  3.3V / 5V ECL D Flip-Flop with Reset and Differential Clock
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100EP51DT データシート(HTML) 5 Page - ON Semiconductor

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MC10EP51, MC100EP51
http://onsemi.com
5
AC CHARACTERISTICS VCC = 0 V; VEE = –3.0 V to –5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21.)
–40
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Frequency
(See Figure 2. Fmax/JITTER)
> 3
> 3
> 3
GHz
tPLH,
tPHL
Propagation Delay to Output Differential
CLK, CLK to Q, Q
10
100
RESET to Q, Q
250
275
300
300
340
380
350
425
450
270
300
325
320
375
400
370
450
475
300
350
350
350
425
425
420
500
500
ps
tRR
Reset Recovery
150
150
150
ps
tS
tH
Setup Time
Hold Time
100
100
100
100
80
40
100
100
ps
tPW
Minimum Pulse Width
RESET
500
440
500
440
500
440
ps
tJITTER
Cycle–to–Cycle Jitter
(See Figure 2. Fmax/JITTER)
.2
< 1
.2
< 1
.2
< 1
ps
tr
tf
Output Rise/Fall Times
Q, Q
(20% – 80%)
70
120
170
80
130
180
100
150
200
ps
21. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 ohms to VCC–2.0 V.
0
100
200
300
400
500
600
700
800
900
1000
1100
0
1000
2000
3000
4000
5000
6000
Figure 2. Fmax/Jitter
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
Measured
Simulated
(JITTER)
9
10
11


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