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SLG46127 データシート(PDF) 62 Page - Dialog Semiconductor

部品番号 SLG46127
部品情報  GreenPAK Programmable Mixed-signal Matrix
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SLG46127
The user can select one of these fundamental frequencies for the RC OSC Macrocell, or the fundamental frequency can also
come from an external clock input (PIN11). There are two divider stages that allow the user flexibility for introducing clock signals
on various Connection Matrix Input lines. The first stage divider (also known as the clock pre-divider) allows the selection of /1,
/2, /4 or /8 divide down frequency from the fundamental. There are two second stage divider controls (OUT0 and OUT1). Each
has its own input of one frequency from the first stage divider, and outputs five different frequencies on Connection Matrix Input
lines <23>, and <24>. See Figure 43 below for details of the frequencies for each of these five Connection Matrix Inputs.
If PWR DOWN input of oscillator is LOW, the oscillator will be turned on. If PWR DOWN input of oscillator is HIGH the oscillator
will be turned off. The PWR DOWN signal has the highest priority.
16.2 RC OSC Block Diagram
Figure 43. RC OSC Block Diagram
Internal RCO
reg <303>
0: 25 kHz
1: 2 MHz
/ 2
/ 3
/ 4
/ 8
/ 12
/ 24
/ 64
To Connection Matrix Input <23>
reg <308:306>
DIV /1/2/4/8
reg <305:304>
First Stage
Divider
Second Stage
Divider
PIN 11 Ext. Clock
Ext. Clk Sel reg <312>
0
1
reg <311:309>
To Connection Matrix Input <24>
From Connection Matrix Output <38>
PWR DOWN


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