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SLG46200 データシート(PDF) 24 Page - Dialog Semiconductor |
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SLG46200 データシート(HTML) 24 Page - Dialog Semiconductor |
24 / 69 page 000-0046200-124 Page 19 of 64 SLG46200 10.0 Serial to Parallel / Parallel to Serial Converter (S2P) The Serial to Parallel / Parallel to Serial Converter (S2P) transfers the data between the SLG46200 and the larger system design through either the serial to parallel or parallel to serial interface. It has two 16-bit registers (2 bytes) that are used for data transfer. The clock signal comes from PIN 4 and the nCSB (Enable Control Signal) comes from the Connection Matrix Out. S2P uses edge detection from the CNT1/DLY1 for capturing its counter data. 10.1 S2P Functional Diagram 10.2 Serial to Parallel Operation For serial to parallel operation (S2P), the serial data in (SDI) comes from PIN 3 (MOSI) of the SLG46200. The S2P will produce a 16-bit parallel data output (PDO<15:0>) which is used by the PWM, FSM, and the two Digital Comparators (DCMP0 and DCMP1). The MSB S2P<15:8> can be used by the PWM, FSM, DCMP0, and DCMP1 logic cells, while the LSB S2P<7:0> can be used by the DCMP0 and DCMP1 logic cells. Figure 6. S2P Functional Diagram 1 0 Serial to Parallel PIN 4 reg <319> Parallel to Serial Serial data from PIN 3 8-bit output from Counter1 <15:8> 1 0 ADC_serial_out reg <372> 8-bit ADC PIN 6 PIN 7 From Connection Matrix output <0> 1 0 From Connection Matrix output <12> reg <373> To PIN 3 <7:0> PWM FSM DCMP0 DCMP1 IN- IN+ IN- IN+ CNT1/DLY1 Edge Detector reg <374> CAPTURE (MOSI) (MISO) |
同様の部品番号 - SLG46200 |
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同様の説明 - SLG46200 |
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