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SLG46400 データシート(PDF) 82 Page - Dialog Semiconductor |
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SLG46400 データシート(HTML) 82 Page - Dialog Semiconductor |
82 / 95 page 000-0046400-109 Page 76 of 89 SLG46400 reg<529:514> LUT4 data reg<530> DFF0 or Latch select 0: DFF function 1: Latch function reg<531> DFF0 nRST/nSET select 0: nRST from matrix out1 1: nSET from matrix out1 reg<532> DFF1 or Latch select 0: DFF function 1: Latch function reg<533> DFF1 nRST/nSET select 0: nRST from matrix out18 1: nSET from matrix out18 reg<534> DFF2 or Latch select 0: DFF function 1: Latch function reg<535> DFF3 or Latch select 0: DFF function 1: Latch function reg<537:536> Delay value select 00: 20ns 01: 40ns 10: 60ns 11: 80ns reg<538> Reserved reg<540:539> PIN8 initial state control 00: floating 01: ground 10: power 11: input reg<543:541> PIN8 mode control 000: digital in mode with Schmitt trigger 001: digital in mode without Schmitt trigger 010: low voltage digital in mode without Schmitt trigger 011: analog IO mode 100: push pull current x2 101: open drain mode 110: analog IO & open drain mode 111: push pull mode reg<545:544> PIN8 pull up/down resistor value selection 00: Floating 01: 50K 10: 100K 11: 300K reg<546> PIN8 pull up/down resistor 0: pull down resistor 1: pull up resistor reg<547> PIN8 push pull output Enable 0: Disable 1: Enable reg<549:548> PIN9 Initial State Control 00: floating 01: ground 10: power 11: input Bit Address Register Definition |
同様の部品番号 - SLG46400 |
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同様の説明 - SLG46400 |
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