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TDA9965A データシート(PDF) 8 Page - NXP Semiconductors

部品番号 TDA9965A
部品情報  12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
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メーカー  PHILIPS [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9965A データシート(HTML) 8 Page - NXP Semiconductors

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2004 Jul 05
8
Philips Semiconductors
Product specification
12-bit, 5.0 V, 40 Msps analog-to-digital
interface for CCD cameras
TDA9965A
tW(SHD)
SHD pulse width
Vi(IN) =1000mV;
transition (98.5%) in 1 pixel;
code fco(CTH) = 0000;
see Fig.5
8
−−
ns
code fco(CTH)
0000
7
ns
0001
12
ns
0010
16
ns
0100
22
ns
1000
32
ns
1111
49
ns
th(IN-SHP)
CTH input hold time
compared to control pulse
SHP
see Fig.5
3
ns
th(IN-SHD)
CTH input hold time
compared to control pulse
SHD
see Fig.5
3
ns
Programmable Gain Amplifier (PGA) output: pin PGAOUT
VPGAOUT(p-p)
PGA output amplifier
dynamic voltage level
(peak-to-peak value)
2000
mV
VPGAOUT(b)
PGA output amplifier black
level voltage
code C(CLP) =0
1.475
V
ZPGAOUT
PGA output amplifier
output impedance
fpix at 10 kHz for minimum
and maximum values
5
−Ω
IPGAOUT
PGA output current drive
static
−−
1mA
GPGA(min)
minimum gain of PGA
circuit
code GPGA =0
0
dB
GPGA(max)
maximum gain of PGA
circuit
code GPGA ≥767
36
dB
Analog-to-Digital Converter (ADC)
fpix(max)
maximum pixel frequency
40
−−
MHz
tW(CLKADC)H
CLKADC pulse width
HIGH
Vi(IN) = 1000 mV;
transition (99.5%) in 1 pixel;
code fco(CTH) = 0000;
code GPGA = 128; see Fig.5
11
−−
ns
tW(CLKADC)L
CLKADC pulse width
LOW
Vi(IN) = 1000 mV;
transition (99.5%) in 1 pixel;
code fco(CTH) = 0000;
code GPGA = 128
11
−−
ns
SRCLKADC
CLKADC input slew rate
rising and falling edges;
10% to 90%
0.5
−−
V/ns
Vi(ADCIN)(p-p)
ADC input voltage
(peak-to-peak value)
with internal regulator
2
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT


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