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ACT88320QI-T データシート(PDF) 19 Page - Active-Semi, Inc

部品番号 ACT88320QI-T
部品情報  Advanced PMU with Inrush Control and Bypass Switch
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メーカー  ACTIVE-SEMI [Active-Semi, Inc]
ホームページ  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT88320QI-T データシート(HTML) 19 Page - Active-Semi, Inc

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ACT88320QI-T
Rev 2.0, 20-Dec-2017
Innovative PowerTM
www.active-semi.com
ActiveSwitcherTM is a trademark of Active-Semi.
Copyright © 2017 Active-Semi, Inc
19
RESET
Power 
Sequence 
Start
POWER ON
(Active)
OVUV Fault
Thermal Fault
Thermal Shutdown 
Fault & DIS_OTS = 0
Thermal Fault 
Cleared
SLEEP
Clears all registers and 
defaults to original NVM 
settings in RESET state
VIN_OV or VIN_UV in 
any state puts the IC in 
RESET state
Example for a typical configuration.
Other transitions are possible with factory 
programmed configurations.
DPSLP
(Deep Sleep)
(DPSLP_EN = 1 & PWREN = 0 & DPSLP MODE = 1) 
OR
(DPSLP_EN = 1 & PWREN = 0 & DPSLP MODE = 0 
& DPSLP Bit = 1)
PWREN = 1
VIN_NOT_OK
UV> VIN > OV
SLEEP Bit = 1 &
SLEEP_EN = 1
OVUV Fault 
Retry Timer 
(100ms)
DIS OVUV = 0  & 
Mask = 0
Clear DPSLP_EN & 
SLEEP_EN if set to 1 
upon entering OVUV 
Fault State
Clear DPSLP_EN & 
SLEEP_EN if set to 1 
upon entering Thermal 
Fault State
VIN_OK
UV < VIN < OV
SLEEP Bit = 1 &
SLEEP_EN = 1
SLEEP Bit = 0 OR
SLEEP_EN = 0
Figure 1 PWREN State Machine
Special consideration is needed for DPSLP state in with
a non-I2C system. When PWREN is first toggled high
after power up, the ACT88320 detects the first rising
transition of PWREN from 0 to 1 and sets the
DPSLP_EN register bit to 1. On the falling transition of
PWREN from 1 to 0, DPSLP state is entered. In a con-
dition when the system is powered up when PWREN =
1, PWREN must be toggled to 0 and back to 1 to set the
DPSLP_EN bit. The next falling PWREN transition puts
the IC into the DPSLP state. While in DPSLP mode, if
there is a fault condition such as system UV or OV or a
thermal fault, the IC resets the DPSLP_EN bit back to 0
when it exits DPSLP mode. This requires PWREN to be
toggled high to set the DPSLP_EN to 1 again and then
toggled back low to enter DPSLP state again. The IC
does not automatically go back into DPSLP state after
exiting the DPSLP state due to fault conditions.


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