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GS1522 データシート(PDF) 6 Page - Gennum Corporation |
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GS1522 データシート(HTML) 6 Page - Gennum Corporation |
6 / 20 page GENNUM CORPORATION 522 - 26 - 00 6 58 RSET0 Analog Input Control Signal Input. External resistor is used to set the data output amplitude for SDO0 and SDO0. Use a ±1% resistor. 63 A0 TTL TEST Test Signal. Used for manufacturing test purposes only. This pin must be tied low for normal operation. 64 OSC_VEE Power Input Negative Supply. Ground for ring oscillator. This pin must be floating for normal operation. 74 VCO Analog Input Control Signal Input. Input pin is AC coupled to ground using a 50 Ω transmission line. 75 VCO Analog Input Control Signal Input. Voltage controlled oscillator input. This pin is connected to the output pin of the GO1515 VCO. This pin must be connected to the GO1515 VCO output pin via a 50 Ω transmission line. 76 PD_VEE Power Input Negative Supply. Most negative power supply connection. For phase detector stage. 77 PDSUB_VEE Power Input Guard Ring. Ground guard ring connection to isolate phase detector in PLL stage. 78 IJI Analog Output Status Signal Output. Indicates the amount of excessive jitter on the incoming SDI and SDI input. 79 PD_VCC Power Input Positive Supply. Most positive power supply connection. For phase detector stage. 82, 84 LFS, LFS Analog Input Loop Filter Connections. 85, 87 PLCAP, PLCAP Analog Input Control Signal Input. Phase lock detect time constant capacitor. 86 DM Test Signal. Used for manufacturing test only. This pin must be left floating in normal operation. 88 DFT_VEE Power Input Most Negative Power Supply Connection . Enables the jitter demodulator functionality. This pin should be connected to ground. If left floating, the DM function is disabled resulting in a current saving of 340µA. 89 LFA_VEE Power Input Negative Supply. Most negative power supply connection. For loop filter stage. 90 LFA Analog Output Control Signal Output. Control voltage for GO1515 VCO. 91 LBCONT Analog Input Control Signal Input. Used to provide electronic control of Loop Bandwidth. 92 LFA_VCC Power Input Positive Supply. Most positive power supply connection. For loop filter stage. 94 VCC3 Power Input Positive Supply. Most positive power supply connection. For input stage. 96 SYNC_DETECT_DISABLE TTL Input Control Signal Input. Used to disable the sync detection function. Logic HIGH disables sync detection. Logic LOW: 000-003 is mapped into 000 and 3FC-3FF is mapped into 3FF for 8-bit operation. 103, 104, 105, 106, 107, 110, 111, 112, 113, 114, 115, 118, 119, 122, 123, 124, 125, 126, 127, 128 DATA_IN[19:0] TTL Input Input Data Bus. The device receives a 20 bits data stream running at 74.25 or 74.25/1.001 MHz from the GS1501 HDTV Formatter or GS1511 HDTV Formatter. Input data can be in SMPTE292M scrambled or unscrambled format. DATA_IN[19] is the MSB (pin 103). DATA_IN[0] is the LSB (pin 128). PIN DESCRIPTIONS (Continued) NUMBER SYMBOL LEVEL TYPE DESCRIPTION |
同様の部品番号 - GS1522 |
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同様の説明 - GS1522 |
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