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LTM4633 データシート(PDF) 18 Page - Linear Technology |
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LTM4633 データシート(HTML) 18 Page - Linear Technology |
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18 / 32 page  LTM4633 18 4633f For more information www.linear.com/LTM4633 applicaTions inForMaTion A graphical representation of the aforementioned ther- mal resistances is given in Figure 3; blue resistances are contained within the μModule regulator, whereas green resistances are external to the µModule package. As a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defined by JESD 51-12 or provided in the Pin Configuration section replicates or conveys normal operating conditions of a μModule regulator. For example, in normal board-mounted applications, never does 100% of the device’s total power loss (heat) thermally con- duct exclusively through the top or exclusively through bottom of the µModule package—as the standard defines for θJCtop and θJCbottom, respectively. In practice, power loss is thermally dissipated in both directions away from the package—granted, in the absence of a heat sink and airflow, a majority of the heat flow is into the board. Within the LTM4633, be aware there are multiple power devices and components dissipating power, with a con- sequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. To reconcile this complication without sacrificing modeling simplicity— but also, not ignoring practical realities—an approach has been taken using FEA software modeling along with laboratory testing in a controlled environment chamber to reasonably define and correlate the thermal resistance valuessuppliedinthisdatasheet:(1)Initially,FEAsoftware is used to accurately build the mechanical geometry of the LTM4633 and the specified PCB with all of the cor- rect material coefficients along with accurate power loss source definitions; (2) this model simulates a software- defined JEDEC environment consistent with JSDE 51-12 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the JEDEC-defined thermal resistance values; (3) the model and FEA software is used to evaluate the LTM4633 with heat sink and airflow; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermocouples within a controlled environment chamber while operating the device at the same power loss as that which was simulated. The outcome of this process and due diligence yields a set of derating curves provided in other sections of this data sheet. After these laboratory tests have been performed and cor- related to the LTM4633 model, then the θJB and θBA are summed together to correlate quite well with the device model conditions of no airflow or heat sinking in a properly 4633 F03 µMODULE DEVICE JUNCTION-TO-CASE (TOP) RESISTANCE JUNCTION-TO-BOARD RESISTANCE JUNCTION-TO-AMBIENT RESISTANCE COMPONENTS CASE (TOP)-TO-AMBIENT RESISTANCE BOARD-TO-AMBIENT RESISTANCE JUNCTION-TO-CASE (BOTTOM) RESISTANCE JUNCTION AMBIENT CASE (BOTTOM)-TO-BOARD RESISTANCE Figure 3. Graphical Representations of JESD51-12 Thermal Coefficients |
同様の部品番号 - LTM4633 |
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同様の説明 - LTM4633 |
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