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BTS7020-2EPA データシート(PDF) 10 Page - Infineon Technologies AG

部品番号 BTS7020-2EPA
部品情報  Smart High-Side Power Switch
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メーカー  INFINEON [Infineon Technologies AG]
ホームページ  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

BTS7020-2EPA データシート(HTML) 10 Page - Infineon Technologies AG

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Data Sheet
10
Rev. 1.00
2017-08-24
BTS7020-2EPA
PROFETTM+2
General Product Characteristics
4.4
Thermal Resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards. For more
information, go to www.jedec.org.
4.4.1
PCB Setup
Figure 5
1s0p PCB Cross Section
Figure 6
2s2p PCB Cross Section
Table 6
Thermal Resistance1)
1) Not subject to production test - specified by design.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
Typ.
Max.
Thermal Characterization
Parameter Junction-Top
ΨJTOP
–1.8
3
K/W
2)
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; the Product (Chip
+ Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 µm Cu, 2 × 35 µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Simulation done
at TA = 105°C, PDISSIPATION = 1 W.
P_4.4.0.1
Thermal Resistance
Junction-to-Case
RthJC
–1.1
1.9
K/W
2)
simulated at
exposed pad
P_4.4.0.2
Thermal Resistance
Junction-to-Ambient
RthJA
31.1
K/W
2)
P_4.4.0.3
70 µm Modeled (traces, cooling area)
70 µm, 5% metalization*
PCB_Zth_1s0p.emf
*: means percentual Cu metalization on each layer
70 µm modelled (traces)
35 µm, 90% metalization*
70 µm, 5% metalization*
PCB_Zth_2s2p.emf
35 µm, 90% metalization*
*: means percentual Cu metalization on each layer


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