データシートサーチシステム |
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CSE7759B データシート(PDF) 8 Page - Core Technology (Shenzhen) Co., Ltd. |
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CSE7759B データシート(HTML) 8 Page - Core Technology (Shenzhen) Co., Ltd. |
8 / 25 page 本资料为芯海科技专有财产,非经许可,不得复制、翻印或转变其他形式使用。 This document is exclusive property of CHIPSEA and shall not be reproduced or copied or transformed to any other format without prior permission of CHIPSEA 聚点滴之芯.成浩瀚之海 8/25 No-load current (to be determined by overall noise) 60 mA Voltage: 1MR divider resistance (ideal value, without resistance error) Voltage measurement range: 80V~260V(relative error) -2 1 2 % Power: (ideal value, without current sampling resistance error and divider resistance error) Above 55W (relative error) -2 1 2 % Below 55W (absolute error) 1 2.5 W Min. measured value of power (to be determined by overall noise) 3 W No-load power (to be determined by overall noise) 0 W 2.4 Digital Characteristics VDD = 5V, GND = 0V, 25℃(unless otherwise stated) Parameters Symbol Min. Value Typical Value Max. Value Unit Master clock Frequency of master clock MCLK 3.04 3.579 4.12 MHz Duty ratio of master clock 30 50 70 % Filter Input sampling rate (DCLK=MCLK/K) - MCLK /4 - MHz Output bit rate of digital filter OWR - MCLK /128 - MHz Corner frequency of high-pass filter (-3dB) - 0.543 - Hz Input/output High level output voltage Iout VOH VDD-0.5 - - V |
同様の部品番号 - CSE7759B |
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同様の説明 - CSE7759B |
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