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MC10EP29 データシート(PDF) 7 Page - ON Semiconductor

部品番号 MC10EP29
部品情報  3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10EP29 データシート(HTML) 7 Page - ON Semiconductor

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MC10EP29, MC100EP29
http://onsemi.com
7
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Figure 2. Fmax/Jitter
FREQUENCY (MHz)
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(JITTER)
V TT = V CC – 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020 – Termination of ECL Logic Devices.)
W
Driver
Device
Receiver
Device
QD
50
W
50
V TT
Q
D
Resource Reference of Application Notes
AN1404
ECLinPS Circuit Performance at Non–Standard VIH Levels
AN1405
ECL Clock Distribution Techniques
AN1406
Designing with PECL (ECL at +5.0 V)
AN1504
Metastability and the ECLinPS Family
AN1568
Interfacing Between LVDS and ECL
AN1650
Using Wire–OR Ties in ECLinPS Designs
AN1672
The ECL Translator Guide
AND8001
Odd Number Counters Design
AND8002
Marking and Date Codes
AND8009
ECLinPS Plus Spice I/O Model Kit
AND8020
Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.


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