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MC10102 データシート(PDF) 1 Page - ON Semiconductor |
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MC10102 データシート(HTML) 1 Page - ON Semiconductor |
1 / 5 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3–6 REV 5 © Motorola, Inc. 1996 3/93 Quad 2-Input NOR Gate The MC10102 is a quad 2–input NOR gate. The MC10102 provides one gate with OR/NOR outputs. PD = 25 mW typ/gate (No Load) tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 14 13 12 11 10 3 7 6 2 5 4 15 9 MC10102 DIP PIN ASSIGNMENT VCC1 AOUT BOUT AIN AIN BIN BIN VEE VCC2 DOUT COUT DIN DIN CIN CIN DOUT 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). |
同様の部品番号 - MC10102 |
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同様の説明 - MC10102 |
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