データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

PCI7610 データシート(PDF) 87 Page - Texas Instruments

部品番号 PCI7610
部品情報  PC Card, UltraMedia, and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
Download  240 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

PCI7610 データシート(HTML) 87 Page - Texas Instruments

Back Button PCI7610 Datasheet HTML 83Page - Texas Instruments PCI7610 Datasheet HTML 84Page - Texas Instruments PCI7610 Datasheet HTML 85Page - Texas Instruments PCI7610 Datasheet HTML 86Page - Texas Instruments PCI7610 Datasheet HTML 87Page - Texas Instruments PCI7610 Datasheet HTML 88Page - Texas Instruments PCI7610 Datasheet HTML 89Page - Texas Instruments PCI7610 Datasheet HTML 90Page - Texas Instruments PCI7610 Datasheet HTML 91Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 87 / 240 page
background image
4−11
4.19 CardBus Latency Timer Register
The CardBus latency timer register is programmed by the host system to specify the latency timer for the PCI7610
CardBus interface, in units of CCLK cycles. When the PCI7610 controller is a CardBus initiator and asserts CFRAME,
the CardBus latency timer begins counting. If the latency timer expires before the PCI7610 transaction has
terminated, then the PCI7610 controller terminates the transaction at the end of the next data phase. A recommended
minimum value for this register of 20h allows most transactions to be completed.
Bit
7
6
5
4
3
2
1
0
Name
CardBus latency timer
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
Register:
CardBus latency timer
Offset:
1Bh (Functions 0, 1)
Type:
Read/Write
Default:
00h
4.20 CardBus Memory Base Registers 0, 1
These registers indicate the lower address of a PCI memory address range. They are used by the PCI7610 controller
to determine when to forward a memory transaction to the CardBus bus, and likewise, when to forward a CardBus
cycle to PCI. Bits 31−12 of these registers are read/write and allow the memory base to be located anywhere in the
32-bit PCI memory space on 4-Kbyte boundaries. Bits 11−0 are read-only and always return 0s. Writes to these bits
have no effect. Bits 8 and 9 of the bridge control register (PCI offset 3Eh, see Section 4.26) specify whether memory
windows 0 and 1 are prefetchable or nonprefetchable. The memory base register or the memory limit register must
be nonzero in order for the PCI7610 controller to claim any memory transactions through CardBus memory windows
(i.e., these windows by default are not enabled to pass the first 4 Kbytes of memory to CardBus).
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Memory base registers 0, 1
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Memory base registers 0, 1
Type
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Memory base registers 0, 1
Offset:
1Ch, 24h
Type:
Read-only, Read/Write
Default:
0000 0000h


同様の部品番号 - PCI7610

メーカー部品番号データシート部品情報
logo
Texas Instruments
PCI7610 TI1-PCI7610 Datasheet
129Kb / 6P
[Old version datasheet]   PC Card, UltraMedia?
PCI7610GHK TI1-PCI7610GHK Datasheet
129Kb / 6P
[Old version datasheet]   PC Card, UltraMedia?
PCI7610 TI1-PCI7610_10 Datasheet
129Kb / 6P
[Old version datasheet]   PC Card, UltraMedia?
More results

同様の説明 - PCI7610

メーカー部品番号データシート部品情報
logo
Texas Instruments
PCI7410 TI-PCI7410 Datasheet
41Kb / 4P
[Old version datasheet]   PC Card, UltraMedia and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
PCI4510 TI-PCI4510 Datasheet
1Mb / 220P
[Old version datasheet]   PC CARD AND INTEGRATED 1394A-2000 OHCI TWO PORT PHY/LINK LAYER CONTROLLER
PCI4510A TI-PCI4510A Datasheet
219Kb / 7P
[Old version datasheet]   PC Card and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
PCI4510RGVF TI1-PCI4510RGVF Datasheet
67Kb / 5P
[Old version datasheet]   PC Card and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
PCI4520 TI1-PCI4520_09 Datasheet
226Kb / 7P
[Old version datasheet]   Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer
PCI4520 TI-PCI4520 Datasheet
1Mb / 211P
[Old version datasheet]   DUAL-SOCKET PC CARD AND INTEGRATED 1394A-2000 OHCI TWO-PORT PHY/LINK-LAYER CONTROLLER
TSB43AB22A TI-TSB43AB22A Datasheet
518Kb / 112P
[Old version datasheet]   INTEGRATED 1394A-2000 OHCI PHY/LINK-LAYER CONTROLLER
TSB43AB21A TI-TSB43AB21A Datasheet
557Kb / 116P
[Old version datasheet]   Integrated 1394a-2000 OHCI PHY/Link-Layer Controller
TSB43AB22 TI1-TSB43AB22_14 Datasheet
99Kb / 7P
[Old version datasheet]   Integrated 1394a-2000 OHCI PHY/Link-Layer Controller
TSB43AA22 TI-TSB43AA22 Datasheet
442Kb / 100P
[Old version datasheet]   INTEGRATED 1394A 2000 OHCI PHY LINK LAYER CONTROLLER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com