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MC10171 データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC10171
部品情報  Dual Binary to 1-4 Decoder(Low)
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3–107
REV 5
© Motorola, Inc. 1996
3/93
Dual Binary to 1-4 Decoder
(Low)
The MC10171 is a binary coded 2 line to dual 4 line decoder with selected
outputs low. With either E0 or E1 high, the corresponding selected 4 outputs are
high. The common enable E, when high, forces all outputs high.
PD = 325 mW typ/pkg (No Load)
tpd = 4.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
E0 14
A 9
B 7
E 15
E1 2
10 Q0 3
11 Q0 2
12 Q0 1
13 Q0 0
3 Q1 3
4 Q1 2
5 Q1 1
6 Q1 0
TRUTH TABLE
ENABLE INPUTS
INPUTS
OUTPUTS
E
E0
E1
A
B
Q10
Q11
Q12
Q13
Q00
Q01
Q02
Q03
L
L
L
L
L
L
H
H
H
L
H
H
H
L
L
L
L
H
H
L
H
H
H
L
H
H
L
L
L
H
L
H
H
L
H
H
H
L
H
L
L
L
H
H
H
H
H
L
H
H
H
L
L
L
H
L
L
H
H
H
H
L
H
H
H
L
H
L
L
L
L
H
H
H
H
H
H
H
H
X
X
X
X
H
H
H
H
H
H
H
H
MC10171
DIP
PIN ASSIGNMENT
VCC1
E1
Q13
Q12
Q11
Q10
B
VEE
VCC2
E
E0
Q00
Q01
Q02
Q03
A
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).


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