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MC14094B データシート(PDF) 4 Page - ON Semiconductor

部品番号 MC14094B
部品情報  8-Stage Shift/Store Register with Three-State Outputs
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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SWITCHING CHARACTERISTICS (7.) (CL = 50 pF, TA = 25_C)
Characteristic
Symbol
VDD
Vdc
Min
Typ (8.)
Max
Unit
Output Rise and Fall Time
tTLH, tTHL = (1.35 ns/pF) CL + 33 ns
tTLH, tTHL = (0.6 ns/pF) CL + 20 ns
tTLH, tTHL = (0.4 ns/pF) CL + 20 ns
tTLH,
tTHL
5.0
10
15
100
50
40
200
100
80
ns
Propagation Delay Time
Clock to Serial out QS
tPLH, tPHL = (0.90 ns/pF) CL + 305 ns
tPLH, tPHL = (0.36 ns/pF) CL + 107 ns
tPLH, tPHL = (0.26 ns/pF) C L + 82 ns
tPLH,
tPHL
5.0
10
15
350
125
95
600
250
190
ns
Clock to Serial out Q’S
tPLH, tPHL = (0.90 ns/pF) CL + 350 ns
tPLH, tPHL = (0.36 ns/pF) CL + 149 ns
tPLH, tPHL = (0.26 ns/pF) CL + 62 ns
5.0
10
15
230
110
75
460
220
150
Clock to Parallel out
tPLH, tPHL = (0.90 ns/pF) CL + 375 ns
tPLH, tPHL = (0.35 ns/pF) CL + 177 ns
tPLH, tPHL = (0.26 ns/pF) CL + 122 ns
5.0
10
15
420
195
135
840
390
270
Strobe to Parallel out
tPLH, tPHL = (0.90 ns/pF) CL + 245 ns
tPLH, tPHL = (0.36 ns/pF) C L + 127 ns
tPLH, tPHL = (0.26 ns/pF) CL + 87 ns
5.0
10
15
290
145
100
580
290
200
Output Enable to Output
tPHZ, tPZL = (0.90 ns/pF) CL + 95 ns
tPHZ, tPZL = (0.36 ns/PF) CL + 57 ns
tPHZ, tPZL = (0.26 ns/pF) CL + 42 ns
tPHZ,
tPZL
5.0
10
15
140
75
55
280
150
110
tPLZ, tPZH = (0.90 ns/pF) CL + 180 ns
tPLZ, tPZH = (0.36 ns/pF) CL + 77 ns
tPLZ, tPZH = (0.26 ns/pF) CL + 57 ns
tPLZ,
tPZH
5.0
10
15
225
95
70
450
190
140
Setup Time
Data in to Clock
tsu
5.0
10
15
125
55
35
60
30
20
ns
Hold Time
Clock to Data
th
5.0
10
15
0
20
20
– 40
– 10
0
ns
Clock Pulse Width, High
tWH
5.0
10
15
200
100
83
100
50
40
ns
Clock Rise and Fall Time
tr(cl)
tf(cl)
5
10
15
15
5.0
4.0
µs
Clock Pulse Frequency
fcl
5.0
10
15
2.5
5.0
6.0
1.25
2.5
3.0
MHz
Strobe Pulse Width
tWL
5.0
10
15
200
80
70
100
40
35
ns
7. The formulas given are for the typical characteristics only at 25
_C.
8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.


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