データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

X1205S8Z データシート(PDF) 9 Page - Intersil Corporation

部品番号 X1205S8Z
部品情報  2-Wire RTC Real Time Clock/Calendar
Download  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X1205S8Z データシート(HTML) 9 Page - Intersil Corporation

Back Button X1205S8Z Datasheet HTML 5Page - Intersil Corporation X1205S8Z Datasheet HTML 6Page - Intersil Corporation X1205S8Z Datasheet HTML 7Page - Intersil Corporation X1205S8Z Datasheet HTML 8Page - Intersil Corporation X1205S8Z Datasheet HTML 9Page - Intersil Corporation X1205S8Z Datasheet HTML 10Page - Intersil Corporation X1205S8Z Datasheet HTML 11Page - Intersil Corporation X1205S8Z Datasheet HTML 12Page - Intersil Corporation X1205S8Z Datasheet HTML 13Page - Intersil Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 22 page
background image
9
FN8097.2
September 23, 2005
When there is a match, an alarm flag is set. The occur-
rence of an alarm can be determined by polling the
AL0 and AL1 bits or by enabling the IRQ output, using
it as hardware flag.
The alarm enable bits are located in the MSB of the
particular register. When all enable bits are set to ‘0’,
there are no alarms.
– The user can set the X1205 to alarm every Wednes-
day at 8:00 AM by setting the EDWn*, the EHRn*
and EMNn* enable bits to ‘1’ and setting the DWAn*,
HRAn* and MNAn* Alarm registers to 8:00AM
Wednesday.
– A daily alarm for 9:30PM results when the EHRn*
and EMNn* enable bits are set to ‘1’ and the HRAn*
and MNAn* registers are set to 9:30PM.
*n = 0 for Alarm 0: N = 1 for Alarm 1
REAL TIME CLOCK REGISTERS
Clock/Calendar Registers (SC, MN, HR, DT, MO, YR)
These registers depict BCD representations of the
time. As such, SC (Seconds) and MN (Minutes) range
from 00 to 59, HR (Hour) is 1 to 12 with an AM or PM
indicator (H21 bit) or 0 to 23 (with MIL = 1), DT (Date)
is 1 to 31, MO (Month) is 1 to 12, YR (Year) is 0 to 99.
Date of the Week Register (DW)
This register provides a Day of the Week status and
uses three bits DY2 to DY0 to represent the seven
days of the week. The counter advances in the cycle
0-1-2-3-4-5-6-0-1-2-… The assignment of a numerical
value to a specific day of the week is arbitrary and may
be decided by the system software designer. The
default value is defined as ‘0’.
24 Hour Time
If the MIL bit of the HR register is 1, the RTC uses a
24-hour format. If the MIL bit is 0, the RTC uses a 12-
hour format and H21 bit functions as an AM/PM indi-
cator with a ‘1’ representing PM. The clock defaults to
standard time with H21 = 0.
Leap Years
Leap years add the day February 29 and are defined
as those years that are divisible by 4. Years divisible
by 100 are not leap years, unless they are also divisi-
ble by 400. This means that the year 2000 is a leap
year, the year 2100 is not. The X1205 does not correct
for the leap year in the year 2100.
STATUS REGISTER (SR)
The Status Register is located in the CCR memory
map at address 003Fh. This is a volatile register only
and is used to control the WEL and RWEL write
enable latches, read two power status and two alarm
bits. This register is separate from both the array and
the Clock/Control Registers (CCR).
Table 1. Status Register (SR)
BAT: Battery Supply-Volatile
This bit set to “1” indicates that the device is operating
from VBACK, not VCC. It is a read-only bit and is
set/reset by hardware (X1205 internally). Once the
device begins operating from VCC, the device sets this
bit to “0”.
AL1, AL0: Alarm bits-Volatile
These bits announce if either alarm 0 or alarm 1 match
the real time clock. If there is a match, the respective
bit is set to ‘1’. The falling edge of the last data bit in a
SR Read operation resets the flags. Note: Only the AL
bits that are set when an SR read starts will be reset.
An alarm bit that is set by an alarm occurring during an
SR read operation will remain set after the read opera-
tion is complete.
RWEL: Register Write Enable Latch-Volatile
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior
to any writes to the Clock/Control Registers. Writes to
RWEL bit do not cause a nonvolatile write cycle, so
the device is ready for the next operation immediately
after the stop condition. A write to the CCR requires
both the RWEL and WEL bits to be set in a specific
sequence. The RWEL bit is reset by the completion of
a nonvolatile write cycle.
WEL: Write Enable Latch-Volatile
The WEL bit controls the access to the CCR and
memory array during a write operation. This bit is a
volatile latch that powers up in the LOW (disabled)
state. While the WEL bit is LOW, writes to the CCR or
any array address will be ignored (no acknowledge will
be issued after the Data Byte). The WEL bit is set by
writing a “1” to the WEL bit and zeroes to the other bits
of the Status Register. Once set, WEL remains set
until either reset to 0 (by writing a “0” to the WEL bit
and zeroes to the other bits of the Status Register) or
until the part powers up again. Writes to WEL bit do
not cause a nonvolatile write cycle, so the device is
ready for the next operation immediately after the stop
condition.
Addr
7
6
5
4
3
2
1
0
003Fh
BAT
AL1
AL0
0
0
RWEL
WEL
RTCF
Default
0
0
0
0
0
0
0
1
X1205


同様の部品番号 - X1205S8Z

メーカー部品番号データシート部品情報
logo
Renesas Technology Corp
X1205S8Z RENESAS-X1205S8Z Datasheet
873Kb / 22P
   2-Wire??RTC Real Time Clock/Calendar
More results

同様の説明 - X1205S8Z

メーカー部品番号データシート部品情報
logo
Renesas Technology Corp
X1205 RENESAS-X1205 Datasheet
873Kb / 22P
   2-Wire??RTC Real Time Clock/Calendar
logo
NXP Semiconductors
PCF8523 NXP-PCF8523_12 Datasheet
700Kb / 75P
   Real-Time Clock (RTC) and calendar
Rev. 4-5 July 2012
PCF8523 NXP-PCF8523 Datasheet
1Mb / 66P
   Real-Time Clock (RTC) and calendar
Rev. 3-30 March 2011
logo
Intersil Corporation
X1288 INTERSIL-X1288 Datasheet
428Kb / 27P
   2-Wire??RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
logo
Renesas Technology Corp
X1288 RENESAS-X1288 Datasheet
1Mb / 27P
   2-Wire??RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
logo
Xicor Inc.
X1288 XICOR-X1288 Datasheet
560Kb / 31P
   2-Wire RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
logo
Renesas Technology Corp
X1226 RENESAS-X1226 Datasheet
993Kb / 25P
   4K (512 x 8), 2-Wire??RTC Real Time Clock/Calendar with EEPROM
logo
NXP Semiconductors
PCF8563 NXP-PCF8563_11 Datasheet
466Kb / 45P
   Real-time clock/calendar
Rev. 9-16 June 2011
PCF8563TF4.118 NXP-PCF8563TF4.118 Datasheet
492Kb / 50P
   Real-time clock/calendar
Rev. 10-3 April 2012
PCF8563 PHILIPS-PCF8563 Datasheet
692Kb / 30P
   Real-time clock/calendar
16 April 1999
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com