データシートサーチシステム |
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74V2T04STR データシート(PDF) 1 Page - STMicroelectronics |
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74V2T04STR データシート(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 June 2003 s HIGH SPEED: tPD = 4.7ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA =25°C s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL =0.8V (MAX) s POWER DOWN PROTECTION ON INPUT s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =8mA (MIN) at VCC =4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2T04 is an advanced high-speed CMOS TRIPLE INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface5V to3V. 74V2T04 TRIPLE INVERTER PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2T04STR SOT23-8L |
同様の部品番号 - 74V2T04STR |
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同様の説明 - 74V2T04STR |
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