IS61LV25616 datasheet(5/11 Pages) ISSI

部品番号	IS61LV25616

部品情報	256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

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メーカー	ISSI [Integrated Silicon Solution, Inc]

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Integrated Silicon Solution, Inc. — 1-800-379-4774

5

Rev. B

09/29/00

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IS61LV25616

ISSI®

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

-7

-8

-10

-12

-15

Symbol

Parameter

Min. Max.

Unit

tRC

Read Cycle Time

7

—

8

—

10

—

12

—

15

—

ns

tAA

Address Access Time

—

7

—

8

—

10

—

12

—

15

ns

tOHA

Output Hold Time

3

—

3

—

3

—

3

—

3

—

ns

tACE

CE Access Time

—

7

—

8

—

10

—

12

—

15

ns

tDOE

OE Access Time

—

3.5

—

3.5

—

4

—

5

—

7ns

tHZOE(2)

OE to High-Z Output

—

2.5

—

3

—

4

—

50

6

ns

tLZOE(2)

OE to Low-Z Output

0

—

0

—

0

—

0

—

0

—

ns

tHZCE(2

CE to High-Z Output

0

3

—

30

40

60

8

ns

tLZCE(2)

CE to Low-Z Output

2.5

—

3

—

3

—

3

—

3

—

ns

tBA

LB, UB Access Time

—

3

—

3.5

—

4

—

5

—

7ns

tHZB(2)

LB, UB to High-Z Output

0

2.5

0

3

0

3

0

4

0

5

ns

tLZB(2)

LB, UB to Low-Z Output

0

—

0

—

0

—

0

—

0

—

ns

tPU

Power Up Time

0

—

0

—

0

—

0

—

0

—

ns

tPD

Power Down Time

—

7

—

8

—

10

—

12

—

15

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V,

input pulse levels of 0V to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.

Shaded area product in development

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Level

Output Load

See Figures 1 and 2

AC TEST LOADS

Figure 1

Figure 2

319

Ω

5 pF

Including

jig and

scope

353

Ω

OUTPUT

3.3V

ZO = 50

Ω

1.5V

50

Ω

OUTPUT

30 pF

Including

jig and

scope

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IS61LV25616 データシート(PDF) 5 Page - Integrated Silicon Solution, Inc

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