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LM193JAN データシート(PDF) 5 Page - National Semiconductor (TI) |
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LM193JAN データシート(HTML) 5 Page - National Semiconductor (TI) |
5 / 14 page LM193 JAN Electrical Characteristics (Continued) DC Parameters (Continued) Symbol Parameter Conditions Notes Min Max Unit Sub- groups ∆I IO / ∆T Temperature Coefficient of Input Offset Current 25˚C ≤ T A ≤ +125˚C (Note 9) -300 300 pA/˚C 2 -55˚C ≤ T A ≤ 25˚C (Note 9) -400 400 pA/˚C 3 A VS Open Loop Voltage Gain +V CC = 15V, -VCC = 0V, R L = 15K Ω, 1V ≤ V O ≤ 11V (Note 8) 50 V/mV 4 (Note 8) 25 V/mV 5, 6 V Lat Voltage Latch (Logical "1" Input) +V CC = 5V, -VCC = 0V, V I = 10V, IO = 4mA 0.4 V 9 AC Parameters The following conditions apply, unless otherwise specified. +V CC = 5V, −VCC =0V Symbol Parameter Conditions Notes Min Max Unit Sub- groups t RLH Response Time V I = 100mV, RL = 5.1K Ω, V OD = 5mV 5.0 µS 7, 8B 7.0 µS 8A V I = 100mV, RL = 5.1K Ω, V OD = 50mV 0.8 µS 7, 8B 1.2 µS 8A t RHL Response Time V I = 100mV, RL = 5.1K Ω, V OD = 5mV 2.5 µS 7, 8B 3.0 µS 8A V I = 100mV, RL = 5.1K Ω, V OD = 50mV 0.8 µS 7, 8B 1.0 µS 8A CS Channel Separation +V CC = 20V, -VCC = -10V, A to B 80 dB 7 +V CC = 20V, -VCC = -10V, B to A 80 dB 7 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax =(TJmax -TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 3: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 mA independent of the magnitude of V+. Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3VDC. Note 5: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the magnitude of the negative power supply, if used). Note 6: Human body model, 1.5K Ω in series with 100pF. Note 7: S/S RS = 20KΩ, tested with RS = 100KΩ for better resolution Note 8: K in datalog is equivalent to V/mV. Note 9: Calculated parameter for ∆VIO / ∆T and ∆IIO / ∆T. www.national.com 5 |
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