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CD1865 データシート(PDF) 3 Page - Intel Corporation

部品番号 CD1865
部品情報  Intelligent Eight-Channel Communications Controller
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メーカー  INTEL [Intel Corporation]
ホームページ  http://www.intel.com
Logo INTEL - Intel Corporation

CD1865 データシート(HTML) 3 Page - Intel Corporation

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Datasheet
3
Intelligent Eight-Channel Communications Controller — CD1865
Contents
1.0
Overview ......................................................................................................................10
1.1
Theory of Operation ............................................................................................ 10
2.0
Conventions ...............................................................................................................13
2.1
Abbreviations....................................................................................................... 13
2.2
Acronyms ............................................................................................................13
3.0
Device Selection Considerations ......................................................................15
4.0
Pin Information..........................................................................................................16
4.1
Pin Diagram......................................................................................................... 16
4.2
Pin Assignments.................................................................................................. 17
5.0
Functional Description...........................................................................................18
5.1
Introduction.......................................................................................................... 18
5.2
Internal Operation................................................................................................ 20
5.3
Service Request and Interrupt Operation............................................................ 26
5.3.1
Theory of Operation ............................................................................... 26
5.3.2
Internal Implementation of the Service Request Logic........................... 28
5.3.3
Priorities and Fair Share......................................................................... 31
5.4
Types of Service Requests ................................................................................. 31
5.4.1
Receive Service Requests .....................................................................32
5.4.2
Transmit Service Requests .................................................................... 35
5.4.3
Modem Signal Change Service Requests.............................................. 35
5.5
Implementing Service Requests.......................................................................... 35
5.5.1
Method 1a — Full Interrupt – Type A, Three-Level Interrupt
with Three-Level Acknowledge .............................................................. 37
5.5.2
Method 1b — Full Interrupt – Type B, Three-Level
Interrupt with Single-Level Acknowledge ............................................... 38
5.5.3
Method 2b — Interrupt Interface, Single-Level
Interrupt with Single-Level Acknowledge ............................................... 39
5.5.4
Method 3b — Polled Interface................................................................ 40
5.5.5
Comparison of Interrupt and Polled Code Sequences ........................... 42
5.5.6
Cascading Service Requests with Multiple CD1865s ............................ 43
5.5.7
Multiple CD1865s without Cascading..................................................... 44
5.5.8
Acknowledging Service Requests .......................................................... 44
6.0
System Bus Interface and System Clock .......................................................46
6.1
System Interface Considerations ........................................................................ 47
6.2
System Clock and Bit Rate Options .................................................................... 47
6.2.1
System Clock .........................................................................................47
6.2.2
External Clock ........................................................................................ 47
6.2.3
1¥ Clock Option ...................................................................................... 48
6.2.4
Bit Rate Options ..................................................................................... 48
6.2.5
Maximum Throughput Limits .................................................................. 51
6.3
CD1865 Basic Bus Interface and Addressing ..................................................... 51
6.3.1
Intel‚ Versus Motorola‚ Interface Signals and Addressing ...................... 51


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