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AD9887APCB データシート(PDF) 9 Page - Analog Devices

部品番号 AD9887APCB
部品情報  Dual Interface for Flat Panel Displays
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9887APCB データシート(HTML) 9 Page - Analog Devices

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REV. 0
AD9887A
–9–
Table I. Complete Pinout List
Pin
Pin
Pin
Type
Mnemonic
Function
Value
Number
Interface
Analog Video
RAIN
Analog Input for Converter R
0.0 V to 1.0 V
119
Analog
Inputs
GAIN
Analog Input for Converter G
0.0 V to 1.0 V
110
Analog
BAIN
Analog Input for Converter B
0.0 V to 1.0 V
100
Analog
External
HSYNC
Horizontal SYNC Input
3.3 V CMOS
82
Analog
Sync/Clock
VSYNC
Vertical SYNC Input
3.3 V CMOS
81
Analog
Inputs
SOGIN
Input for Sync-on-Green
0.0 V to 1.0 V
108
Analog
CLAMP
Clamp Input (External CLAMP Signal)
3.3 V CMOS
93
Analog
COAST
PLL COAST Signal Input
3.3 V CMOS
84
Analog
CKEXT
External Pixel Clock Input (to Bypass the PLL) to VDD or Ground
3.3 V CMOS
83
Analog
CKINV
ADC Sampling Clock Invert
3.3 V CMOS
94
Analog
Sync Outputs
HSOUT
HSYNC Output Clock (Phase-Aligned with DATACK)
3.3 V CMOS
139
Both
VSOUT
VSYNC Output Clock
3.3 V CMOS
138
Both
SOGOUT
Composite Sync
3.3 V CMOS
140
Analog
Voltage
REFOUT
Internal Reference Output (Bypass with 0.1
µF to Ground)
1.25 V
126
Analog
Reference
REFIN
Reference Input (1.25 V
± 10%)
1.25 V
± 10%
125
Analog
Clamp Voltages
RMIDSCVRed Channel Midscale Clamp Voltage Output
120
Analog
RCLAMPVRed Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
118
Analog
GMIDSCVGreen Channel Midscale Clamp Voltage Output
111
Analog
GCLAMPVGreen Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
109
Analog
BMIDSCVBlue Channel Midscale Clamp Voltage Output
101
Analog
BCLAMPVBlue Channel Midscale Clamp Voltage Input
0.0 V to 0.75 V
99
Analog
PLL Filter
FILT
Connection for External Filter Components for Internal PLL
78
Analog
Power Supply
VD
Analog Power Supply
3.3 V
± 10%
Both
VDD
Output Power Supply
3.3 V
± 10%
Both
PVD
PLL Power Supply
3.3 V
± 10%
Both
GND
Ground
0 V
Both
Serial Port
SDA
Serial Port Data I/O
3.3 V CMOS
92
Both
(2-Wire
SCL
Serial Port Data Clock (100 kHz Max)
3.3 V CMOS
91
Both
Serial Interface)
A0
Serial Port Address Input 1
3.3 V CMOS
90
Both
A1
Serial Port Address Input 2
3.3 V CMOS
89
Both
Data Outputs
Red B[7:0]
Port B/Odd Outputs of Converter “Red,” Bit 7 Is the MSB
3.3 V CMOS
153–160
Both
Green B[7:0]
Port B/Odd Outputs of Converter “Green,” Bit 7 Is the MSB
3.3 V CMOS
13–20
Both
Blue B[7:0]
Port B/Odd Outputs of Converter “Blue,” Bit 7 Is the MSB
3.3 V CMOS
33–40
Both
Red A[7:0]
Port A/Even Outputs of Converter “Red,” Bit 7 Is the MSB
3.3 V CMOS
143–150
Both
Green A[7:0]
Port A/Even Outputs of Converter “Green,” Bit 7 Is the MSB
3.3 V CMOS
3–10
Both
Blue A[7:0]
Port A/Even Outputs of Converter “Blue,” Bit 7 Is the MSB
3.3 V CMOS
23–30
Both
Data Clock
DATACK
Data Output Clock for the Analog and Digital Interface
3.3 V CMOS
134
Both
Outputs
DATACK
Data Output Clock Complement for the Analog Interface Only
3.3 V CMOS
135
Both
Sync Detect
SCDT
Sync Detect Output
3.3 V CMOS
136
Both
Scan Function
SCANIN
Input for SCAN Function
3.3 V CMOS
129
Both
SCANOUT
Output for SCAN Function
3.3 V CMOS
45
Both
SCANCLK
Clock for SCAN Function
3.3 V CMOS
50
Both
Digital Video
Rx0+
Digital Input Channel 0 True
62
Digital
Data Inputs
Rx0–
Digital Input Channel 0 Complement
63
Digital
Rx1+
Digital Input Channel 1 True
59
Digital
Rx1–
Digital Input Channel 1 Complement
60
Digital
Rx2+
Digital Input Channel 2 True
56
Digital
Rx2–
Digital Input Channel 2 Complement
57
Digital


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