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MN6155 データシート(PDF) 4 Page - Panasonic Semiconductor |
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MN6155 データシート(HTML) 4 Page - Panasonic Semiconductor |
4 / 9 page MN6155 For Communications Equipment MN6155 Frequency Dividing Data Settings 1) Comparator side frequency dividing data FV = FIN ÷ {(16 × N) + A} 2) Reference side frequency dividing data a) Low-speed operation (RSL pin at "H" level, using XIN) FR = XIN ÷ R b) High-speed operation (RSL pin at "L" level, using RIN) FR =RIN ÷ {(16 × NR) + AR} where FIN : Comparator side frequency RIN : High-speed reference frequency XIN : Low-speed reference oscillator frequency FV : Comparator frequency divider stage output frequency FR : Reference frequency divider stage output frequency N : Setting for 14-bit programmable counter on comparator side A : Setting for 4-bit swallow counter on comparator side R : Setting for 17-bit programmable counter on low-speed reference side NR : Setting for 13-bit programmable counter on high-speed reference side AR : Setting for 4-bit swallow counter on low-speed reference side (Note that N should be greater than A; NR, greater than AR.) MSB MSB MSB R-Side Latch Data Low-speed operation High-speed operation N-Side Latch Data 14 bits 4 bits LSB LSB LSB 4 bits 13 bits 17 bits Programmable counter setting (N) Swallow counter setting (A) Programmable counter setting (N) Programmable counter setting (NR) Swallow counter setting (AR) |
同様の部品番号 - MN6155 |
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同様の説明 - MN6155 |
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