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ADM1068ACP データシート(PDF) 3 Page - Analog Devices

部品番号 ADM1068ACP
部品情報  Super Sequencer??and Monitor
Download  28 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADM1068ACP データシート(HTML) 3 Page - Analog Devices

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Preliminary Technical Data
ADM1068
Rev. PrB | Page 3 of 28
GENERAL DESCRIPTION
(continued from Page 1)
The device provides up to eight programmable inputs for
monitoring under, over, or out-of-window faults on up to eight
supplies. In addition, eight programmable outputs can be used
as logic enables. Six of them can also provide up to a 12 V
output for driving the gate of an N-channel FET, which can be
placed in the path of a supply.
The logical core of the device is a sequencing engine. This state-
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The whole configuration can be
programmed using an intuitive GUI-based software package
provided by ADI.
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
SFD
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
DEVICE
CONTROLLER
OSC
EEPROM
SDA SCL
A1
A0
SMBus
INTERFACE
ADM1068
CONFIGURABLE
O/P DRIVER
(HV)
PDO1
PDO2
PDOGND
PDO3
GND
PDO4
PDO5
CONFIGURABLE
O/P DRIVER
(HV)
PDO6
CONFIGURABLE
O/P DRIVER
(LV)
PDO7
CONFIGURABLE
O/P DRIVER
(LV)
PDO8
SEQUENCING
ENGINE
VX2
VX3
VP2
VP3
VH
VP1
VX1
AGND
VX4
VDD
ARBITRATOR
VCCP
REG 5.25V
CHARGE PUMP
REFOUT
10
µF
REFGND
VREF
10
µF
10
µF
VDDCAP
Figure 2. Detailed Block Diagram


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