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GS78116B-15I データシート(PDF) 5 Page - GSI Technology

部品番号 GS78116B-15I
部品情報  512K x 16 8Mb Asynchronous SRAM
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メーカー  GSI [GSI Technology]
ホームページ  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS78116B-15I データシート(HTML) 5 Page - GSI Technology

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Rev: 1.02 9/2001
5/11
© 1999, Giga Semiconductor, Inc.
For latest documentation see http://www.gsitechnology.com.
GS78116B
AC Test Conditions
AC Characteristics
Read Cycle
Parameter
Symbol
-10
-12
-15
Unit
Min Max Min Max Min Max
Read cycle time
tRC
10
12
15
ns
Address access time
tAA
10
12
15
ns
Chip enable access time (CE)
tAC
10
12
15
ns
Output enable to output valid (OE)
tOE
4
5
6
ns
Output hold from address change
tOH
3
3
3
ns
Chip enable to output in low Z (CE)
tLZ*
3
3
3
ns
Output enable to output in low Z (OE)
tOLZ*
0
0
0
ns
Chip disable to output in High Z (CE)
tHZ*
5
6
7
ns
Output disable to output in High Z (OE)
tOHZ*
4
5
6
ns
DQ
VT = 1.4 V
50
30pF1
DQ
3.3 V
Output Load 1
Output Load 2
589
434
5pF1
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
Parameter
Conditions
Input high level
VIH = 2.4 V
Input low level
VIL = 0.4 V
Input rise time
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output reference level
1.4 V
Output load
Fig. 1& 2


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