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74AHCT573PW データシート(PDF) 3 Page - NXP Semiconductors |
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74AHCT573PW データシート(HTML) 3 Page - NXP Semiconductors |
3 / 20 page 1999 Sep 27 3 Philips Semiconductors Product specification Octal D-type transparent latch; 3-state 74AHC573; 74AHCT573 FUNCTION TABLE See note 1. Note 1. H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition; L = LOW voltage level; I = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition; Z = high-impedance OFF-state. ORDERING INFORMATION PINNING OPERATING MODES INPUTS INTERNAL LATCHES OUTPUTS OE LE Dn Q0 to Q7 Enable and read register (transparent mode) L H LLL L HHHH Latch and read register L L I L L LLh H H Latch register and disable outputs HL l L Z HL hH Z OUTSIDE NORTH AMERICA NORTH AMERICA PACKAGES PINS PACKAGE MATERIAL CODE 74AHC573D 74AHC573D 20 SO plastic SOT163-1 74AHC573PW 74AHC573PW DH 20 TSSOP plastic SOT360-1 74AHCT573D 74AHCT573D 20 SO plastic SOT163-1 74AHCT573PW 7AHCT573PW DH 20 TSSOP plastic SOT360-1 PIN SYMBOL DESCRIPTION 1 OE 3-state output enable input (active LOW) 2to9 D0 to D7 data inputs 10 GND ground (0 V) 11 LE latch enable input (active HIGH) 12 to 19 Q7 to Q0 3-state latch outputs 20 VCC DC supply voltage |
同様の部品番号 - 74AHCT573PW |
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同様の説明 - 74AHCT573PW |
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