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MC14557BCL データシート(PDF) 1 Page - Motorola, Inc

部品番号 MC14557BCL
部品情報  1-TO-64 BIT VARIABLE LENGTH SHIFT REGISTER
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メーカー  MOTOROLA [Motorola, Inc]
ホームページ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC14557BCL データシート(HTML) 1 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
1
MC14557B
1-to-64 Bit Variable Length
Shift Register
The MC14557B is a static clocked serial shift register whose length may
be programmed to be any number of bits between 1 and 64. The number of
bits selected is equal to the sum of the subscripts of the enabled Length
Control inputs (L1, L2, L4, L8, L16, and L32) plus one. Serial data may be
selected from the A or B data inputs with the A/B select input. This feature is
useful for recirculation purposes. A Clock Enable (CE) input is provided to
allow gating of the clock or negative edge clocking capability.
The device can be effectively used for variable digital delay lines or simply
to implement odd length shift registers.
• 1–64 Bit Programmable Length
• Q and Q Serial Buffered Outputs
• Asynchronous Master Reset
• All Inputs Buffered
• No Limit On Clock Rise and Fall Times
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or one Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package†
500
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/
_C From 100_C To 125_C
LENGTH SELECT TRUTH TABLE
L32
L16
L8
L4
L2
L1
Register Length
0
0
0
0
0
0



1
1



1
1
1
1
0
0
0
0
0
0



0
0



1
1
1
1
0
0
0
0
0
0



0
0



1
1
1
1
0
0
0
0
1
1



0
0



1
1
1
1
0
0
1
1
0
0



0
0



0
1
1
0
0
1
0
1
0
1



0
1



0
1
0
1
1 Bit
2 Bits
3 Bits
4 Bits
5 Bits
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
0
0
0
0
0



1
1



1
1
1
1
0
0
0
0
0



0
0



1
1
1
1
0
0
0
0
0



0
0



1
1
1
1
0
0
0
1
1



0
0



1
1
1
1
0
1
1
0
0



0
0



0
1
1
0
1
0
1
0
1



0
1



0
1
0
1
2 Bits
3 Bits
4 Bits
5 Bits
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
0
0
0
0



1
1



1
1
1
1
0
0
0
0



0
0



1
1
1
1
0
0
0
0



0
0



1
1
1
1
0
0
1
1



0
0



1
1
1
1
1
1
0
0



0
0



0
1
1
0
0
1
0
1



0
1



0
1
0
1
3 Bits
4 Bits
5 Bits
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
0
0
0



1
1



1
1
1
1
0
0
0



0
0



1
1
1
1
0
0
0



0
0



1
1
1
1
0
1
1



0
0



1
1
1
1
1
0
0



0
0



0
1
1
0
1
0
1



0
1



0
1
0
1
4 Bits
5 Bits
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
0
0



1
1



1
1
1
1
0
0



0
0



1
1
1
1
0
0



0
0



1
1
1
1
1
1



0
0



1
1
1
1
0
0



0
0



0
1
1
0
0
1



0
1



0
1
0
1
5 Bits
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
0



1
1



1
1
1
1
0



0
0



1
1
1
1
0



0
0



1
1
1
1
1



0
0



1
1
1
1
0



0
0



0
1
1
0
1



0
1



0
1
0
1
6 Bits



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits



1
1



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



1
1
1
1



0
0



0
1
1
0



0
1



0
1
0
1



33 Bits
34 Bits



61 Bits
62 Bits
63 Bits
64 Bits
NOTE: Length equals the sum of the binary length control
subscripts plus one.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
© Motorola, Inc. 1995
REV 3
1/94
MC14557B
BLOCK DIAGRAM
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
TRUTH TABLE
Inputs
Output
Rst
A/B
Clock
CE
Q
0
0
0
B
0
1
0
A
0
0
1
B
0
1
1
A
1
X
X
X
0
Q is the output of the first selected shift
register stage.
X = Don’t Care
12
13
14
1
15
2
9
7
6
5
4
3
11
10
RESET
CLOCK
CE
B
A
A/B SELECT
L1
L2
L4
L8
L16
L32
Q
Q
VDD = PIN 16
VSS = PIN 8


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