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AD9992 データシート(Datasheet) 4 Page - Analog Devices

部品番号. AD9992
部品情報  12-Bit CCD Signal Processor with Precision Timing Generator
ダウンロード  92 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD9992
Rev. C | Page 4 of 92
DIGITAL SPECIFICATIONS
IOVDD = 1.6 V to 3.6 V, RGVDD = HVDD = 2.7 V to 3.6 V, CL = 20 pF, TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
LOGIC INPUTS (IOVDD)
High Level Input Voltage
VIH
VDD − 0.6
V
Low Level Input Voltage
VIL
0.6
V
High Level Input Current
IIH
10
μA
Low Level Input Current
IIL
10
μA
Input Capacitance
CIN
10
pF
LOGIC OUTPUTS (IOVDD, XVDD)
High Level Output Voltage @ IOH = 2 mA
VOH
VDD − 0.5
V
Low Level Output Voltage @ IOL = 2 mA
VOL
0.5
V
RG and H-DRIVER OUTPUTS (HVDD, RGVDD)
High Level Output Voltage @ Maximum Current
VOH
VDD − 0.5
V
Low Level Output Voltage @ Maximum Current
VOL
0.5
V
Maximum Output Current (Programmable)
18
mA
Maximum Load Capacitance (for Each Output)
60
pF
800mV
MAXIMUM
MINIMUM INPUT LIMIT
(AVSS – 0.2V)
0V (AVSS)
1V MAXIMUM INPUT SIGNAL RANGE
(0dB CDS GAIN)
+1.3V TYP (AVDD – 0.5V)
DC RESTORE VOLTAGE
+1.8V TYP (AVDD)
MAXIMUM INPUT LIMIT = LESSER OF
2.2V or AVDD + 0.2V
200mV MAX
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
Figure 2. Input Signal Characteristics
(See Allowable OB Pixel Amplitude in Table 3)




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