データシートサーチシステム
Selected language   Japanese  ▼
品番検索
         詳細検索


MC68340 データシート(Datasheet) 83 Page - Freescale Semiconductor, Inc

部品番号. MC68340
部品情報  Integrated Processor with DMA User’s Manual
ダウンロード  441 Pages
Scroll/Zoom Zoom In 100% Zoom Out
メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo 

 83 page
background image
3- 34
MC68340 USER’S MANUAL
MOTOROLA
3.5.1 Bus Errors
BERR can be used to abort the bus cycle and the instruction being executed. BERR takes
precedence over
DSACK
≈ provided it meets the timing constraints described in Section
11 Electrical Characteristics. If
BERR does not meet these constraints, it may cause
unpredictable operation of the MC68340. If
BERR remains asserted into the next bus
cycle, it may cause incorrect operation of that cycle. When
BERR is issued to terminate a
bus cycle, the MC68340 can enter exception processing immediately following the bus
cycle, or it can defer processing the exception.
The instruction prefetch mechanism requests instruction words from the bus controller
before it is ready to execute them. If a bus error occurs on an instruction fetch, the
MC68340 does not take the exception until it attempts to use that instruction word. Should
an intervening instruction cause a branch or should a task switch occur, the bus error
exception does not occur. The bus error condition is recognized during a bus cycle in any
of the following cases:
DSACK
≈ and HALT are negated, and BERR is asserted.
HALT and BERR are negated, and DSACK
≈ is asserted. BERR is then asserted
within one clock cycle (
HALT remains negated).
BERR and HALT are asserted simultaneously, indicating a retry.
When the MC68340 recognizes a bus error condition, it terminates the current bus cycle in
the normal way. Figure 3-17 shows the timing of a bus error for the case in which
DSACK
≈ is not asserted. Figure 3-18 shows the timing for a bus error that is asserted
after
DSACK
≈. Exceptions are taken in both cases. Refer to Section 5 CPU32 for details
of bus error exception processing.
In the second case, in which
BERR is asserted after DSACK
≈ is asserted, BERR must be
asserted within the time specified for purely asynchronous operation, or it must be
asserted and remain stable during the sample window around the next falling edge of the
clock after
DSACK
≈ is recognized. If BERR is not stable at this time, the MC68340 may
exhibit erratic behavior.
BERR has priority over DSACK
≈. In this case, data may be
present on the bus, but it may not be valid. This sequence can be used by systems that
have memory error detection and correction logic and by external cache memories.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com




Html ページ

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download



関連電子部品番号

部品番号コンポーネントの説明Html Viewメーカー
HMC585MS8GHIGH IP3 GaAs MMIC MIXER with INTEGRATED LO AMPLIFIER 400 - 650 MHz 1 2 3 4 5 MoreHittite Microwave Corporation
ADA4412-3Integrated Triple Video Filter with Selectable Cutoff Frequencies for RGB HD/SD 1 2 3 4 5 MoreAnalog Devices
LMX2531LQ1500EHigh Performance Frequency Synthesizer System with Integrated VCO 1 2 3 4 5 MoreNational Semiconductor (TI)
MSP34X1GMultistandard Sound Processor Family with Virtual Dolby Surround 1 2 3 4 5 MoreMicronas
ADN2804622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier 1 2 3 4 5 MoreAnalog Devices
AD999212-Bit CCD Signal Processor with Precision Timing Generator 1 2 3 4 5 MoreAnalog Devices
ADE7768Energy Metering IC with Integrated Oscillator and Positive Power Accumulation 1 2 3 4 5 MoreAnalog Devices
CS5302Two−Phase Buck Controller with Integrated Gate Drivers and 4−Bit DAC 1 2 3 4 5 MoreON Semiconductor
CS5303Three−Phase Buck Controller with Integrated Gate Drivers 1 2 3 4 5 MoreON Semiconductor
CS5308Two−Phase PWM Controller with Integrated Gate Drivers for VRM 8.5 1 2 3 4 5 MoreON Semiconductor

リンク URL

ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ]  

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   ブックマーク   |   リンク交換   |   メーカーリスト
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl