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ADT7488A データシート(Datasheet) 4 Page - Analog Devices

部品番号. ADT7488A
部品情報  SST Digital Temperature Sensor and Voltage Monitor
ダウンロード  16 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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ADT7488A
Rev. 0 | Page 4 of 16
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SST TIMING
Bitwise Period, tBIT
0.495
500
μs
High Level Time for Logic 1, tH12
0.6 × tBIT
0.75 × tBIT
0.8 × tBIT
μs
tBIT defined in speed negotiation
High Level Time for Logic 0, tH02
0.2 × tBIT
0.25 × tBIT
0.4 × tBIT
μs
Time to Assert SST High for Logic 1, tSU,HIGH
0.2 × tBIT
μs
Hold Time, tHOLD3
0.5 × tBIT-M
μs
See SST Specification Rev 1.0
Stop Time, tSTOP
1.25 × tBIT
2 × tBIT
2 × tBIT
μs
Device responding to a constant low
level driven by originator
Time to Respond After a Reset, tRESET
0.4
ms
Response Time to Speed Negotiation
After Power-Up
500
μs
Time after power-up when device can
participate in speed negotiation
1 Guaranteed by design, not production tested.
2 Minimum and maximum bit times are relative to tBIT defined in the timing negotiation pulse.
3 Device is compatible with hold time specification as driven by SST originator.




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