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ADUM3200 データシート(Datasheet) 3 Page - Analog Devices

部品番号. ADUM3200
部品情報  Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
ダウンロード  20 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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ADuM3200/ADuM3201
Rev. 0 | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications
apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
IDDI (Q)
0.4
0.8
mA
Output Supply Current, per Channel, Quiescent
IDDO (Q)
0.5
0.6
mA
ADuM3200, Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current
IDD1 (Q)
1.3
1.7
mA
DC to 1 MHz logic signal freq.
VDD2 Supply Current
IDD2 (Q)
1.0
1.6
mA
DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
IDD1 (10)
3.5
4.6
mA
5 MHz logic signal freq.
VDD2 Supply Current
IDD2 (10)
1.7
2.8
mA
5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current
IDD1 (25)
7.7
10.0
mA
12.5 MHz logic signal freq.
VDD2 Supply Current
IDD2 (25)
3.1
3.9
mA
12.5 MHz logic signal freq.
ADuM3201, Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current
IDD1 (Q)
1.1
1.5
mA
DC to 1 MHz logic signal freq.
VDD2 Supply Current
IDD2 (Q)
1.3
1.8
mA
DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
IDD1 (10)
2.6
3.4
mA
5 MHz logic signal freq.
VDD2 Supply Current
IDD2 (10)
3.1
4.0
mA
5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current
IDD1 (25)
5.3
6.8
mA
12.5 MHz logic signal freq.
VDD2 Supply Current
IDD2 (25)
6.4
8.3
mA
12.5 MHz logic signal freq.
For All Models
Input Currents
IIA, IIB
−10
+0.01
+10
μA
0 ≤ VIA, VIB ≤ VDD1 or VDD2
Logic High Input Threshold
VIH
0.7 VDD1,
VDD2
V
Logic Low Input Threshold
VIL
0.3 VDD1,
VDD2
V
Logic High Output Voltages
VOAH
VDD1,
VDD2 − 0.1
5.0
V
IOx = −20 μA, VIx = VIxH
VOBH
VDD1,
VDD2 − 0.5
4.8
V
IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages
VOAL
0.0
0.1
V
IOx = 20 μA, VIx = VIxL
VOBL
0.04
0.1
V
IOx = 400 μA, VIx = VIxL
0.2
0.4
V
IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM320xAR
Minimum Pulse Width2
PW
1000
ns
CL = 15 pF, CMOS signal levels
Maximum Data Rate3
1
Mbps
CL = 15 pF, CMOS signal levels
Propagation Delay4
tPHL, tPLH
20
150
ns
CL = 15 pF, CMOS signal levels
Pulse-Width Distortion, |tPLH − tPHL|4
PWD
40
ns
CL = 15 pF, CMOS signal levels
Propagation Delay Skew5
tPSK
100
ns
CL = 15 pF, CMOS signal levels
Channel-to-Channel Matching6
tPSKCD/OD
50
ns
CL = 15 pF, CMOS signal levels
Output Rise/Fall Time (10% to 90%)
tR/tF
10
ns
CL = 15 pF, CMOS signal levels




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