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AD15452 データシート(Datasheet) 1 Page - Analog Devices

部品番号. AD15452
部品情報  12-Bit 65 MSPS Quad A/D Converter with Integrated Signal Conditioning
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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12-Bit 65 MSPS Quad A/D Converter with
Integrated Signal Conditioning
AD15452
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
FEATURES
12-bit, 65 MSPS, quad, analog-to-digital converter
Differential input with 100 Ω input impedance
Full-scale analog input: 296 mV p-p
200 MHz, 3 dB bandwidth
SNR @ −9 dBFS
64 dBFS (70 MHz AIN)
64 dBFS (140 MHz AIN)
SFDR @ −9 dBFS
81 dBFS (70 MHz AIN)
73 dBFS (140 MHz AIN)
475 mW per channel
Quad LVDS outputs
Data clock output provided
Offset binary output data format
APPLICATIONS
Antijam GPS receivers
Wireless and wired broadband communications
Communications test equipment
PRODUCT HIGHLIGHTS
1. Quad, 12-bit, 65 MSPS, analog-to-digital converter with
integrated analog signal conditioning optimized for antijam
global positioning system receiver (AJ-GPS) applications.
2. Packaged in a space saving 81-lead, 10 mm x 10 mm chip
scale package ball grid array (CSP_BGA) and specified over
the industrial temperature range (−40°C to +85°C).
GENERAL DESCRIPTION
The AD15452 is a quad, 12-bit, 65 MSPS, analog-to-digital
converter (ADC). It features a differential front-end
amplification circuit followed by a sample-and-hold amplifier
and multistage pipeline analog-to-digital converter. It is
designed to operate with a 3.3 V analog supply and a 3.3 V
digital supply. Each input is fully differential. The input signals
are ac-coupled and terminated in 100 Ω input impedances. The
full-scale differential signal input range is 296 mV p-p.
Four separate 12-bit digital output signals provide data flow
from the ADCs. The digital output data is presented in offset
binary format. A single-ended clock input is used to control all
internal conversion cycles. The AD15452 is optimized for
applications in antijam global positioning receivers and is suited
for communications applications.
FUNCTIONAL BLOCK DIAGRAM
D+A
D–A
IN_A
PDOWN
LPF
D+B
D–B
IN_B
LPF
D+C
D–C
IN_C
LPF
D+D
D–D
IN_D
LPF
CLK
Figure 1.




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