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AD9927 データシート(Datasheet) 95 Page - Analog Devices

部品番号. AD9927
部品情報  14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD9927
Rev. 0 | Page 95 of 100
Table 60. V-Sequence (VSEQ) Registers
Address
Data
Bits
Default
Value
Update
Type
Name
Description
00
[0]
X
SCP
CLPOBPOL
CLPOB start polarity.
[1]
X
PBLKPOL
PBLK start polarity.
[5:2]
X
HOLD
1 = enable HOLD function for each VPAT group (A, B, C, D).
[9:6]
X
VMASK_EN
1 = enable FREEZE/RESUME for each VPAT group (A, B, C, D).
[13:10]
X
CONCAT_GRP
Combine multiple VPAT groups together in one sequence. Set register
equal to 0x01 to enable.
[15:14]
X
VREP_MODE
Defines V-alternation repetition mode.
00 = single pattern alternation for all groups.
01 = two pattern alternation for all groups.
10 = three-pattern alternation for Group A. Groups B, C, and D
follow pattern {0, 1, 1, 0, 1, 1…}.
11 = four-pattern alternation for Group A. Two-pattern alternation
for Groups B, C, and D.
[19:16]
X
LASTREPLEN_EN
Enable use of last repetition counter for last repetition length of each group.
[23:20]
X
LASTTOG_EN
Enable the fifth toggle position for all V-signals in each group.
[25:24]
X
HBLK_MODE
Selection of HBLK modes.
00 = HBLK Mode 0 (normal six-toggle operation).
01 = HBLK Mode 1.
10 = HBLK Mode 2. (Address 0x19 to Address 0x1E operate differently.)
11 = test only, do not access.
01
[12:0]
X
SCP
HDLENE
HD line length for even lines.
[25:13]
X
HDLENO
HD line length for odd lines.
02
[23:0]
X
SCP
VSGPATSEL
Selects which two toggle positions are used by each V-output when they
are configured as VSG pulses (Miscellaneous Register Address 0x1C, fixed
register area).
0 = use Toggles 1, 2; 1 = use Toggles 3, 4.
[24]
HDLENE_13
HD length Bit [13] for even lines when 14-bit H-counter is enabled.
[25]
HDLENO_13
HD length Bit [13] for odd lines when 14-bit H-counter is enabled.
03
[23:0]
X
SCP
VPOL_A
Starting polarities for each V-output signal (Group A).
04
[23:0]
X
SCP
VPOL_B
Starting polarities for each V-output signal (Group B).
05
[23:0]
X
SCP
VPOL_C
Starting polarities for each V-output signal (Group C).
06
[23:0]
X
SCP
VPOL_D
Starting polarities for each V-output signal (Group D).
07
[23:0]
X
SCP
GROUPSEL_0
Select which group each XV1 ~ XV12 signal is assigned to.
00 = Group A, 01 = Group B, 10 = Group C, 11 = Group D.
[1:0]: XV1; [3:2]: XV2 … [23:22]: XV12.
08
[23:0]
X
SCP
GROUPSEL_1
Select which group each XV13 ~ XV24 signal is assigned to.
00 = Group A, 01 = Group B, 10 = Group C, 11 = Group D.
[1:0]: XV13; [3:2]: XV14 … [23:22]: XV24.
09
[4:0]
X
SCP
VPATSELA
Selected VPAT group for Group A, from VPAT Group 0 ~ 31.
[9:5]
X
VPATSELB
Selected VPAT group for Group B, from VPAT Group 0 ~ 31.
[14:10]
X
VPATSELC
Selected VPAT group for Group C, from VPAT Group 0 ~ 31.
[19:15]
X
VPATSELD
Selected VPAT group for Group D, from VPAT Group 0 ~ 31.
0A
[12:0]
X
SCP
VSTARTA
Start position of selected V-Pattern Group A.
[25:13]
X
VLENA
Length of selected V-Pattern Group A.
0B
[12:0]
X
SCP
VREPA_1
Number of repetitions for V-Pattern Group A for first lines.
[25:13]
X
VREPA_2
Number of repetitions for V-Pattern Group A for second lines.
0C
[12:0]
X
SCP
VREPA_3
Number of repetitions for V-Pattern Group A for third lines.
[25:13]
X
VREPA_4
Number of repetitions for V-Pattern Group A for fourth lines.
0D
[12:0]
X
SCP
VSTARTB
Start position of selected V-Pattern Group B.
[25:13]
X
VLENB
Length of selected V-Pattern Group B.
0E
[12:0]
X
SCP
VREPB_ODD
Number of repetitions for V-Pattern Group B for odd lines.
[25:13]
X
VREPB_EVEN
Number of repetitions for V-Pattern Group B for even lines.




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