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AD9927 データシート(Datasheet) 28 Page - Analog Devices

部品番号. AD9927
部品情報  14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD9927
Rev. 0 | Page 28 of 100
VERTICAL TIMING GENERATION
The AD9927 provides a flexible solution for generating vertical
CCD timing and can support multiple CCDs and different
system architectures. The vertical transfer clocks are used to
shift each line of pixels into the horizontal output register of the
CCD. The AD9927 allows these outputs to be individually
programmed into various readout configurations by using a
4-step process.
Figure 34 shows an overview of how the vertical timing is
generated in four steps.
1. The individual pulse patterns for XV1 to XV24 are created by
using the vertical pattern group registers.
2. The V-pattern groups are used to build the sequences, which
is where additional information is added.
3. The readout for an entire field is constructed by dividing the
field into different regions and then assigning a sequence to
each region. Each field can contain up to nine different regions
to accommodate different steps of the readout, such as high
speed line shifts and unique vertical line transfers. The total
number of V-patterns, V-sequences, and fields is programmable,
but limited by the number of registers.
4. The MODE registers allow the different fields to be combined
in any order for various readout configurations.




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