データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AD9942 データシート(PDF) 25 Page - Analog Devices

部品番号 AD9942
部品情報  Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing??Core
Download  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9942 データシート(HTML) 25 Page - Analog Devices

Back Button AD9942 Datasheet HTML 21Page - Analog Devices AD9942 Datasheet HTML 22Page - Analog Devices AD9942 Datasheet HTML 23Page - Analog Devices AD9942 Datasheet HTML 24Page - Analog Devices AD9942 Datasheet HTML 25Page - Analog Devices AD9942 Datasheet HTML 26Page - Analog Devices AD9942 Datasheet HTML 27Page - Analog Devices AD9942 Datasheet HTML 28Page - Analog Devices AD9942 Datasheet HTML 29Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 36 page
background image
AD9942
Rev. A | Page 25 of 36
Table 20. Channel A and Channel B HBLK Individual Sequence Parameters
Parameter
Length
(Bit)
Range
Description
HBLKMASK
1
High/low
Masking polarity for H1 for Sequences 0 to 3 (0 = low; 1 = high).
Toggle Position 1
12
0 to 4095 pixel locations
First toggle position within the line for Sequences 0 to 3.
Toggle Position 2
12
0 to 4095 pixel locations
Second toggle position within the line for Sequences 0 to 3.
Toggle Position 3
12
0 to 4095 pixel locations
Third toggle position within the line for Sequences 0 to 3.
Toggle Position 4
12
0 to 4095 pixel locations
Fourth toggle position within the line for Sequences 0 to 3.
Toggle Position 5
12
0 to 4095 pixel locations
Fifth toggle position within the line for Sequences 0 to 3.
Toggle Position 6
12
0 to 4095 pixel locations
Sixth toggle position within the line for Sequences 0 to 3.
Table 21. Channel A and Channel B Horizontal Sequence Control Registers for CLPOB, PBLK, and HBLK
Register
Length
(Bit)
Range
Description
SCP
12
0 to 4095 line numbers
CLPOB/PBLK/HBLK SCP to define Horizontal Regions 0 to 3.
SPTR
2
0 to 3 sequence numbers
Sequence pointer for Horizontal Regions 0 to 3.
Table 22. Channel A and Channel B External HBLK Register Parameters
Register
Length (Bit)
Range
Description
HBLKDIR
1
High/low
Specifies HBLK internally generated or externally supplied. 0 = internal; 1 = external.
HBLKPOL
1
High/low
External HBLK active polarity. 0 = active low; 1 = active high.
HBLKEXTMASK
1
High/low
External HBLK masking polarity. 0 = mask H1 low; 1 = mask H1 high.
H-COUNTER SYNCHRONIZATION
The H-counter reset occurs seven CLI cycles after the HD falling edge.
0123
4567
89
10
11
12
14
15
012
3
H-COUNTER
RESET
VD_X
NOTES
1. INTERNAL H COUNTER IS RESET SEVEN CLI_X CYCLES AFTER THE HD_X FALLING EDGE (WHEN USING VDHDEDGE = 0).
2. TYPICAL TIMING RELATIONSHIP: CLI_X RISING EDGE IS COINCIDENT WITH HD_X FALLING EDGE.
HD_X
CLI_X
XX
XX
X
X
X
H COUNTER
(PIXEL COUNTER)
XX
X
Figure 26. H-Counter Synchronization


同様の部品番号 - AD9942

メーカー部品番号データシート部品情報
logo
Analog Devices
AD9942 AD-AD9942_15 Datasheet
654Kb / 36P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing Core
REV. A
More results

同様の説明 - AD9942

メーカー部品番号データシート部品情報
logo
Analog Devices
AD9942 AD-AD9942_15 Datasheet
654Kb / 36P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing Core
REV. A
AD9974 AD-AD9974 Datasheet
73Kb / 2P
   Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing??Core
Rev. Sp0
AD9974BBCZ AD-AD9974BBCZ Datasheet
902Kb / 52P
   Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core
REV. A
AD9972BBCZ AD-AD9972BBCZ Datasheet
71Kb / 2P
   Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core
Rev. SpA
AD9978BCPZ AD-AD9978BCPZ Datasheet
69Kb / 2P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing Core
Rev. SpB
AD9978 AD-AD9978_08 Datasheet
69Kb / 2P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing Core
Rev. SpB
AD9973 AD-AD9973 Datasheet
68Kb / 2P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing??Core
Rev. SpA
AD9978 AD-AD9978 Datasheet
71Kb / 2P
   Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing Core
Rev. SpA
AD9979 AD-AD9979_15 Datasheet
589Kb / 56P
   14-Bit, CCD Signal Processor with Precision Timing Core
REV. C
AD9979BCPZRL AD-AD9979BCPZRL Datasheet
589Kb / 56P
   14-Bit, CCD Signal Processor with Precision Timing Core
REV. C
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com