データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

EP20K400 データシート(PDF) 19 Page - Altera Corporation

部品番号 EP20K400
部品情報  Programmable Logic Device Family
Download  117 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  ALTERA [Altera Corporation]
ホームページ  http://www.altera.com
Logo ALTERA - Altera Corporation

EP20K400 データシート(HTML) 19 Page - Altera Corporation

Back Button EP20K400 Datasheet HTML 15Page - Altera Corporation EP20K400 Datasheet HTML 16Page - Altera Corporation EP20K400 Datasheet HTML 17Page - Altera Corporation EP20K400 Datasheet HTML 18Page - Altera Corporation EP20K400 Datasheet HTML 19Page - Altera Corporation EP20K400 Datasheet HTML 20Page - Altera Corporation EP20K400 Datasheet HTML 21Page - Altera Corporation EP20K400 Datasheet HTML 22Page - Altera Corporation EP20K400 Datasheet HTML 23Page - Altera Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 117 page
background image
Altera Corporation
19
APEX 20K Programmable Logic Device Family Data Sheet
Normal Mode
The normal mode is suitable for general logic applications, combinatorial
functions, or wide decoding functions that can take advantage of a
cascade chain. In normal mode, four data inputs from the LAB local
interconnect and the carry-in are inputs to a four-input LUT. The
Quartus II software Compiler automatically selects the carry-in or the
DATA3
signal as one of the inputs to the LUT. The LUT output can be
combined with the cascade-in signal to form a cascade chain through the
cascade-out signal. LEs in normal mode support packed registers.
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, accumulators, and
comparators. An LE in arithmetic mode uses two 3-input LUTs. One LUT
computes a three-input function; the other generates a carry output. As
shown in Figure 8, the first LUT uses the carry-in signal and two data
inputs from the LAB local interconnect to generate a combinatorial or
registered output. For example, when implementing an adder, this output
is the sum of three signals: DATA1, DATA2, and carry-in. The second LUT
uses the same three signals to generate a carry-out signal, thereby creating
a carry chain. The arithmetic mode also supports simultaneous use of the
cascade chain. LEs in arithmetic mode can drive out registered and
unregistered versions of the LUT output.
The Quartus II software implements parameterized functions that use the
arithmetic mode automatically where appropriate; the designer does not
need to specify how the carry chain will be used.
Counter Mode
The counter mode offers clock enable, counter enable, synchronous
up/down control, synchronous clear, and synchronous load options. The
counter enable and synchronous up/down control signals are generated
from the data inputs of the LAB local interconnect. The synchronous clear
and synchronous load options are LAB-wide signals that affect all
registers in the LAB. Consequently, if any of the LEs in an LAB use the
counter mode, other LEs in that LAB must be used as part of the same
counter or be used for a combinatorial function. The Quartus II software
automatically places any registers that are not used by the counter into
other LABs.


同様の部品番号 - EP20K400

メーカー部品番号データシート部品情報
logo
Altera Corporation
EP20K400 ALTERA-EP20K400 Datasheet
456Kb / 34P
   1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
EP20K400 ALTERA-EP20K400 Datasheet
633Kb / 36P
   Enhanced Configuration (EPC) Devices Datasheet
EP20K400 ALTERA-EP20K400 Datasheet
621Kb / 36P
   This datasheet describes enhanced configuration (EPC) devices
EP20K400 ALTERA-EP20K400 Datasheet
724Kb / 117P
   Programmable Logic Device Family
EP20K400 ALTERA-EP20K400 Datasheet
724Kb / 117P
   Programmable Logic Device Family
More results

同様の説明 - EP20K400

メーカー部品番号データシート部品情報
logo
Altera Corporation
EP20K400EFI672-2X ALTERA-EP20K400EFI672-2X Datasheet
724Kb / 117P
   Programmable Logic Device Family
EPM7128SLC84-15 ALTERA-EPM7128SLC84-15 Datasheet
1Mb / 66P
   Programmable Logic Device Family
EPM7128STC100-15N ALTERA-EPM7128STC100-15N Datasheet
1Mb / 66P
   Programmable Logic Device Family
EPM3064ATC44-10N ALTERA-EPM3064ATC44-10N Datasheet
715Kb / 46P
   Programmable Logic Device Family
EP1K30TC144-3N ALTERA-EP1K30TC144-3N Datasheet
1Mb / 86P
   Programmable Logic Device Family
EPM7192SQI160-10N ALTERA-EPM7192SQI160-10N Datasheet
1Mb / 66P
   Programmable Logic Device Family
EPM7160STI100-10 ALTERA-EPM7160STI100-10 Datasheet
1Mb / 66P
   Programmable Logic Device Family
EPF8282ALC84-4 ALTERA-EPF8282ALC84-4 Datasheet
957Kb / 62P
   Programmable Logic Device Family
EPM5064JC-1 ALTERA-EPM5064JC-1 Datasheet
831Kb / 36P
   Programmable Logic Device Family
EPM7032LC44-7 ALTERA-EPM7032LC44-7 Datasheet
1Mb / 66P
   Programmable Logic Device Family
EP1K10TC144-2N ALTERA-EP1K10TC144-2N Datasheet
1Mb / 86P
   Programmable Logic Device Family
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com