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TPA2000D2PWPR データシート(PDF) 9 Page - Texas Instruments |
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TPA2000D2PWPR データシート(HTML) 9 Page - Texas Instruments |
9 / 20 page www.ti.com APPLICATION INFORMATION ELIMINATING THE OUTPUT FILTER WITH THE TPA2000D2 EFFECT ON AUDIO TRADITIONAL CLASS-D MODULATION SCHEME O V –5 V +5 V Current OUT+ Differential Voltage Across Load OUT– TPA2000D2 MODULATION SCHEME TPA2000D2 SLOS291F – MARCH 2000 – REVISED MARCH 2007 This section focuses on why the user can eliminate the output filter with the TPA2000D2. The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are much greater than 20 kHz, so the only signal heard is the amplified input audio signal. The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore, the differential prefiltered output varies between positive and negative VDD, where filtered 50% duty cycle yields 0 volts across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 12. Note that even at an average of 0 volts across the load (50% duty cycle), the current to the load is high causing high loss, thus causing a high supply current. Figure 12. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an Inductive Load With No Input The TPA2000D2 uses a modulation scheme that still has each output switching from 0 to the supply voltage. However, OUT+ and OUT- are now in phase with each other with no input. The duty cycle of OUT+ is greater than 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- is greater than 50% for negative voltages. The voltage across the load sits at 0 volts throughout most of the switching period greatly reducing the switching current, which reduces any I2R losses in the load. 9 Submit Documentation Feedback |
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