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MC100E167FNR2 データシート(PDF) 1 Page - ON Semiconductor |
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MC100E167FNR2 データシート(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 8 1 Publication Order Number: MC10E167/D MC10E167, MC100E167 5VECL 6-Bit 2:1 MUX-Register Description The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW. Features The 100 Series contains temperature compensation. • 1000 MHz Min. Operating Frequency • 800 ps Max. Clock to Output • Single-Ended Outputs • Asynchronous Master Resets • Dual Clocks • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V • Internal Input 50 kW Pulldown Resistors • ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V Charged Device Model; > 2 kV • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D • Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 • Transistor Count = 323 devices • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAM* xxx = 10 or 100 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package PLCC−28 FN SUFFIX CASE 776 MCxxxE167FNG AWLYYWW 1 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION |
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