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MC100ELT24DT データシート(PDF) 2 Page - ON Semiconductor |
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MC100ELT24DT データシート(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC10ELT24, MC100ELT24 http://onsemi.com 2 1 2 3 45 6 7 8 Q GND VCC Figure 1. 8−Lead Pinout (Top View) and Logic Diagram D Q NC NC VEE TTL ECL Table 1. PIN DESCRIPTION Pin Function Q, Q ECL Differential Outputs* D TTL Input VCC Positive Supply VEE Negative Supply GND Ground NC No Connect EP Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. *Output state undetermined when inputs are open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model > 4 kV > 200 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg SOIC−8 TSSOP−8 DFN8 Level 1 Level 1 Level 1 Level 1 Level 3 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 51 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. |
同様の部品番号 - MC100ELT24DT |
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同様の説明 - MC100ELT24DT |
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