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MC10SX1189DR2G データシート(PDF) 4 Page - ON Semiconductor

部品番号 MC10SX1189DR2G
部品情報  Fibre Channel Coaxial Cable Driver and Loop Resiliency Circuit
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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Table 3. AC CHARACTERISTICS (VCC = 4.5 V to 5.5 V) (Note 5)
Symbol
Characteristic
−40°C
0 to 85°C
Unit
Condition
Min
Typ
Max
Min
Typ
Max
tPLH,
tPHL
Propagation Delay
DR → QR (Diff)
to Output
(SE)
DR → QT (Diff)
(SE)
DT → QT (Diff)
(SE)
175
150
250
225
225
200
300
300
425
425
400
400
450
500
650
700
650
725
225
175
300
250
275
225
325
325
450
450
425
425
500
550
650
700
650
725
ps
Note 6
Note 7
Propagation Delay
SEL → QT,QT
450
600
850
500
650
800
1.5V to 50% Pt
tr,
tf
Rise Time
QR,QR
Fall Time
100
100
275
275
400
400
125
125
275
275
400
400
ps
20% to 80%
80% to 20%
tr,
tf
Rise Time
QT,QT
Fall Time
150
150
300
300
550
550
150
150
300
300
550
550
ps
20% to 80%
80% to 20%
tskew
Within Device Skew
15
15
ps
Note 8
VPP
Minimum Input Swing
200
1000
200
1000
mV
Note 9
VCMR
Common Mode Range
3.00
4.35
3.00
4.35
V
Note 10
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. VEE can vary +0.5 V to −0.5 V.
6. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
7. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
8. Duty cycle skew is the difference between tPLH and tPHL propagation delay through a device.
9. Minimum input swing for which AC parameters are guaranteed.
10.The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls
within the specified range and the peak-to-peak voltage lies between VPP Min and 1.0 V.
ORDERING INFORMATION
Device
Package
Shipping
MC10SX1189D
SOIC−16
45 Units / Rail
MC10SX1189DG
SOIC−16
(Pb−Free)
45 Units / Rail
MC10SX1189DR2
SOIC−16
2500 / Tape & Reel
MC10SX1189DR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.


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