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MC74VHCT14AMELG データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC74VHCT14AMELG
部品情報  Hex Schmitt Inverter
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74VHCT14AMELG データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 4
1
Publication Order Number:
MC74VHCT14A/D
MC74VHCT14A
Hex Schmitt Inverter
The MC74VHCT14A is an advanced high speed CMOS Schmitt
inverter fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
Pin configuration and function are the same as the
MC74VHCT04A, but the inputs have hysteresis and, with its Schmitt
trigger function, the VHCT14A can be used as a line receiver which
will receive slow input signals.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
The VHCT14A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 5.5 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: 60 FETs or 15 Equivalent Gates
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
L
H
FUNCTION TABLE
Inputs
Outputs
A
H
L
Y
MARKING
DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
1
SOEIAJ−14
M SUFFIX
CASE 965
SOIC−14
D SUFFIX
CASE 751A
1
1
A
= Assembly Location
WL, L
= Wafer Lot
Y, YY
= Year
WW, W = Work Week
G or
G = Pb−Free Package
1
14
74VHCT14
ALYWG
VHCT14AG
AWLYWW
1
14
VHCT
14A
ALYW
G
G
1
14
(Note: Microdot may be in either location)


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