MC74VHCT541ADT datasheet(2/6 Pages) ONSEMI

部品番号	MC74VHCT541ADT

部品情報	Octal Bus Buffer

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MC74VHCT541A

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2

18

Y1

2

A1

17

Y2

3

A2

16

Y3

4

A3

15

Y4

5

A4

14

Y5

6

A5

13

Y6

7

A6

12

Y7

8

A7

11

Y8

9

A8

OE1

OE2

1

19

OUTPUT

ENABLES

DATA

INPUTS

NONINVERTING

OUTPUTS

Figure 1. Logic Diagram

Figure 2. Pin Assignment

A5

A3

A2

A1

OE1

GND

A8

A7

A6

A4

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

Y3

Y2

Y1

OE2

VCC

Y8

Y7

Y6

Y5

Y4

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage

– 0.5 to + 7.0

V

Vin

DC Input Voltage

– 0.5 to + 7.0

V

Vout

DC Output Voltage

Outputs in 3−State

High or Low State

– 0.5 to + 7.0

– 0.5 to VCC + 0.5

V

IIK

Input Diode Current

− 20

mA

IOK

Output Diode Current (VOUT < GND; VOUT > VCC)

± 20

mA

Iout

DC Output Current, per Pin

± 25

mA

ICC

DC Supply Current, VCC and GND Pins

± 75

mA

PD

Power Dissipation in Still Air,

SOIC Package†

TSSOP Package†

500

450

mW

Tstg

Storage Temperature

– 65 to + 150

_C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings

applied to the device are individual stress limit values (not normal operating conditions) and are

not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

†Derating − SOIC Packages: – 7 mW/

_C from 65_ to 125_C

TSSOP Package: − 6.1 mW/

_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

DC Supply Voltage

4.5

5.5

V

Vin

DC Input Voltage

0

5.5

V

Vout

DC Output Voltage

Outputs in 3−State

High or Low State

0

5.5

VCC

V

TA

Operating Temperature

− 40

+ 85

_C

tr, tf

Input Rise and Fall Time

VCC =5.0V ±0.5V

0

20

ns/V

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND

v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

同様の部品番号 - MC74VHCT541ADT

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