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MC10159 データシート(PDF) 1 Page - ON Semiconductor |
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MC10159 データシート(HTML) 1 Page - ON Semiconductor |
1 / 4 page © Semiconductor Components Industries, LLC, 2002 January, 2002 – Rev. 7 1 Publication Order Number: MC10159/D MC10159 Quad 2-Input Multiplexer (Inverting) The MC10159 is a quad two channel multiplexer with enable. It incorporates common enable and common data select inputs. The select input determines which data inputs are enabled. A high (H) level enables data inputs D00, D10, D20, and D30. A low (L) level enables data inputs D01, D11, D21, and D31. Any change on the data inputs will be reflected at the outputs while the enable is low. Input levels are inverted at the output. • P D=218 mW typ/pkg (No Load) • t pd=2.5 ns typ (Data to Q) • 3.2 ns typ (Select to Q) • t r, tf=2.5 ns typ (20%–80%) DIP PIN ASSIGNMENT Q0 Q1 D11 D10 D01 D00 ENABLE VEE VCC Q2 Q3 D20 D21 D30 D31 SELECT 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). LOGIC DIAGRAM VCC = PIN 16 VEE = PIN 8 SELECT 9 D01 5 D00 6 D11 3 D10 4 D21 12 D20 13 D31 10 D30 11 1 Q0 2 Q1 15 Q2 14 Q3 ENABLE 7 http://onsemi.com Device Package Shipping ORDERING INFORMATION MC10159L CDIP–16 25 Units / Rail MC10159P PDIP–16 25 Units / Rail MC10159FN PLCC–20 46 Units / Rail MARKING DIAGRAMS 1 16 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week CDIP–16 L SUFFIX CASE 620 MC10159L AWLYYWW PDIP–16 P SUFFIX CASE 648 PLCC–20 FN SUFFIX CASE 775 10159 AWLYYWW 1 1 16 MC10159P AWLYYWW Enable Select Q TRUTH TABLE L L L L H L L H H X H L H L L D0 D1 X X L H X L H X X X |
同様の部品番号 - MC10159 |
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同様の説明 - MC10159 |
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