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MC10113 データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC10113
部品情報  Quad Exclusive OR Gate
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10113 データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10113/D
MC10113
Quad Exclusive OR Gate
The MC10113 is a quad Exclusive OR gate, with an enable common
to all four gates. The outputs may be wire–ORed together to perform a
4–bit comparison function (A = B). The enable is active low.
P
D = 175 mW typ/pkg (No Load)
t
pd = 2.5 ns typ
t
r, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
E 9
13
12
15
11
10
14
7
6
3
5
4
2
DIP
PIN ASSIGNMENT
VCC1
AOUT
BOUT
AIN
AIN
BIN
BIN
VEE
VCC2
DOUT
COUT
DIN
DIN
CIN
CIN
ENABLE
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
TRUTH TABLE
IN
E
OUTPUT
L
L
L
L
L
H
L
H
H
L
L
H
H
H
L
L
X
X
H
L
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10113L
CDIP–16
25 Units / Rail
MC10113P
PDIP–16
25 Units / Rail
MC10113FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10113L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10113
AWLYYWW
1
1
16
MC10113P
AWLYYWW


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