© Semiconductor Components Industries, LLC, 2002

January, 2002 – Rev. 7

1

Publication Order Number:

MC10186/D

MC10186

Hex D Master-Slave

Flip-Flop with Reset

The MC10186 contains six high–speed, master slave type “D”

flip–flops. Clocking is common to all six flip–flops. Data is entered

into the master when the clock is low. Master to slave data transfer

takes place on the positive–going Clock transition. Thus, outputs may

change only on a positive–going Clock transition. A change in the

information present at the data (D) input will not affect the output

information any other time due to the master–slave construction of this

device. A COMMON RESET IS INCLUDED IN THIS CIRCUIT.

RESET ONLY FUNCTIONS WHEN CLOCK IS LOW.

LOGIC DIAGRAM

2

5

CLOCK

RESET 1

9

Q0

3

Q1

4

Q2

13 Q3

14 Q4

15 Q5

D0

6

D1

7

D2

10

D3

11

D4

D5 12

CLOCKED TRUTH TABLE

R

C

D

Qn + 1

L

L

X

L

H*

L

L

L

H*

H

H

H

L

X

L

*A clock H is a clock transition

from a low to a high state.

http://onsemi.com

Device

Package

Shipping

ORDERING INFORMATION

MC10186L

CDIP–16

25 Units / Rail

MC10186P

PDIP–16

25 Units / Rail

MC10186FN

PLCC–20

46 Units / Rail

MARKING

DIAGRAMS

1

16

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

CDIP–16

L SUFFIX

CASE 620

MC10186L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

PLCC–20

FN SUFFIX

CASE 775

10186

AWLYYWW

1

1

16

MC10186P

AWLYYWW

DIP PIN ASSIGNMENT

RESET

Q0

Q1

Q2

D0

D1

D2

Q5

Q4

Q3

D5

D4

D3

CLOCK

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables

on page 18 of the ON Semiconductor MECL Data Book

(DL122/D).