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ATMEGA64_0610 データシート(PDF) 71 Page - ATMEL Corporation |
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ATMEGA64_0610 データシート(HTML) 71 Page - ATMEL Corporation |
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71 / 393 page  71 ATmega64(L) 2490L–AVR–10/06 Unconnected Pins If some pins are unused, it is recommended to ensure that these pins have a defined level. Even though most of the digital inputs are disabled in the deep sleep modes as described above, floating inputs should be avoided to reduce current consumption in all other modes where the digital inputs are enabled (Reset, Active mode and Idle mode). The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up. In this case, the pull-up will be disabled during reset. If low power consumption during reset is important, it is recommended to use an external pull-up or pull-down. Connecting unused pins directly to VCC or GND is not recommended, since this may cause excessive currents if the pin is accidentally configured as an output. Alternate Port Functions Most port pins have alternate functions in addition to being general digital I/Os. Figure 33 shows how the port pin control signals from the simplified Figure 30 can be overrid- den by alternate functions. The overriding signals may not be present in all port pins, but the figure serves as a generic description applicable to all port pins in the AVR micro- controller family. Figure 33. Alternate Port Functions (1) Note: 1. WPx, WDx, RLx, RPx, and RDx are common to all pins within the same port. clkI/O, SLEEP, and PUD are common to all ports. All other signals are unique for each pin. Table 26 summarizes the function of the overriding signals. The pin and port indexes from Figure 33 are not shown in the succeeding tables. The overriding signals are gen- erated internally in the modules having the alternate function. clk RPx RRx WPx RDx WDx PUD SYNCHRONIZER WDx: WRITE DDRx WPx: WRITE PORTx RRx: READ PORTx REGISTER RPx: READ PORTx PIN PUD: PULLUP DISABLE clk I/O: I/O CLOCK RDx: READ DDRx D L Q Q SET CLR 0 1 0 1 0 1 DIxn AIOxn DIEOExn PVOVxn PVOExn DDOVxn DDOExn PUOExn PUOVxn PUOExn: Pxn PULL-UP OVERRIDE ENABLE PUOVxn: Pxn PULL-UP OVERRIDE VALUE DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE PVOExn: Pxn PORT VALUE OVERRIDE ENABLE PVOVxn: Pxn PORT VALUE OVERRIDE VALUE DIxn: DIGITAL INPUT PIN n ON PORTx AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx RESET RESET Q Q D CLR Q Q D CLR Q Q D CLR PINxn PORTxn DDxn 0 1 DIEOVxn SLEEP DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE SLEEP: SLEEP CONTROL Pxn I/O |
同様の部品番号 - ATMEGA64_0610 |
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同様の説明 - ATMEGA64_0610 |
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