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ATTINY2313-20MU データシート(Datasheet) 33 Page - ATMEL Corporation

部品番号. ATTINY2313-20MU
部品情報  8-bit Microcontroller with 2K Bytes In-System Programmable Flash
ダウンロード  231 Pages
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
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33
ATtiny2313/V
2543I–AVR–04/06
Power Management
and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the three sleep modes, the SE bit in MCUCR must be written to logic
one and a SLEEP instruction must be executed. The SM1 and SM0 bits in the MCUCR
Register select which sleep mode (Idle, Power-down, or Standby) will be activated by
the SLEEP instruction. See Table 13 for a summary. If an enabled interrupt occurs while
the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles
in addition to the start-up time, executes the interrupt routine, and resumes execution
from the instruction following SLEEP. The contents of the register file and SRAM are
unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Figure 11 on page 24 presents the different clock systems in the ATtiny2313, and their
distribution. The figure is helpful in selecting an appropriate sleep mode.
MCU Control Register –
MCUCR
The Sleep Mode Control Register contains control bits for power management.
• Bits 6, 4 – SM1..0: Sleep Mode Select Bits 1 and 0
These bits select between the five available sleep modes as shown in Table 13.
Note:
1. Standby mode is only recommended for use with external crystals or resonators.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is
the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one
just before the execution of the SLEEP instruction and to clear it immediately after wak-
ing up.
Idle Mode
When the SM1..0 bits are written to 00, the SLEEP instruction makes the MCU enter
Idle mode, stopping the CPU but allowing the UART, Analog Comparator, ADC, USI,
Timer/Counters, Watchdog, and the interrupt system to continue operating. This sleep
mode basically halts clk
CPU and clkFLASH, while allowing the other clocks to run.
Idle mode enables the MCU to wake up from external triggered interrupts as well as
internal ones like the Timer Overflow and UART Transmit Complete interrupts. If wake-
up from the Analog Comparator interrupt is not required, the Analog Comparator can be
powered down by setting the ACD bit in the Analog Comparator Control and Status
Register – ACSR. This will reduce power consumption in Idle mode.
Bit
7654
321
0
PUD
SM1
SE
SM0
ISC11
ISC10
ISC01
ISC00
MCUCR
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0000
000
0
Table 13. Sleep Mode Select
SM1
SM0
Sleep Mode
00
Idle
0
1
Power-down
1
0
Power-down
1
1
Standby




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