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ATTINY2313-20MU データシート(Datasheet) 5 Page - ATMEL Corporation

部品番号. ATTINY2313-20MU
部品情報  8-bit Microcontroller with 2K Bytes In-System Programmable Flash
ダウンロード  231 Pages
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
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5
ATtiny2313/V
2543I–AVR–04/06
Pin Descriptions
VCC
Digital supply voltage.
GND
Ground.
Port A (PA2..PA0)
Port A is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port A output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port A pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATtiny2313 as listed
on page 56.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATtiny2313 as listed
on page 56.
Port D (PD6..PD0)
Port D is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port D output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATtiny2313 as listed
on page 59.
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will gener-
ate a reset, even if the clock is not running. The minimum pulse length is given in Table
15 on page 37. Shorter pulses are not guaranteed to generate a reset. The Reset Input
is an alternate function for PA2 and dW.
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
XTAL1 is an alternate function for PA0.
XTAL2
Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1.




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