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SG3525A データシート(PDF) 1 Page - ON Semiconductor

部品番号 SG3525A
部品情報  Pulse Width Modulator Control Circuit
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

SG3525A データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
1
Publication Order Number:
SG3525A/D
SG3525A
Pulse Width Modulator
Control Circuit
The SG3525A pulse width modulator control circuit offers
improved performance and lower external parts count when
implemented for controlling all types of switching power supplies.
The on−chip +5.1 V reference is trimmed to
"1% and the error
amplifier has an input common−mode voltage range that includes the
reference voltage, thus eliminating the need for external divider
resistors. A sync input to the oscillator enables multiple units to be
slaved or a single unit to be synchronized to an external system clock.
A wide range of deadtime can be programmed by a single resistor
connected between the CT and Discharge pins. This device also
features built−in soft−start circuitry, requiring only an external timing
capacitor. A shutdown pin controls both the soft−start circuitry and the
output stages, providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft−start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs
and the changing of the soft−start capacitor when VCC is below
nominal. The output stages are totem−pole design capable of sinking
and sourcing in excess of 200 mA. The output stage of the SG3525A
features NOR logic resulting in a low output for an off−state.
Features
8.0 V to 35 V Operation
5.1 V " 1.0% Trimmed Reference
100 Hz to 400 kHz Oscillator Range
Separate Oscillator Sync Pin
Adjustable Deadtime Control
Input Undervoltage Lockout
Latching PWM to Prevent Multiple Pulses
Pulse−by−Pulse Shutdown
Dual Source/Sink Outputs: "400 mA Peak
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
1
16
PDIP−16
N SUFFIX
CASE 648
1
16
SG3525AN
AWLYYWW
PIN CONNECTIONS
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
(Top View)
Inv. Input
Sync
OSC. Output
RT
Discharge
Soft−Start
Noninv. Input
CT
Compensation
Shutdown
Output A
VC
Output B
VCC
Vref
Ground
1
16
SG3525A
AWLYYWW
SOIC−16L
DW SUFFIX
CASE 751G
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
16
1
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