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74ABT573CMTC データシート(PDF) 5 Page - Fairchild Semiconductor

部品番号 74ABT573CMTC
部品情報  Octal D-Type Latch with 3-STATE Outputs
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ABT573CMTC データシート(HTML) 5 Page - Fairchild Semiconductor

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©1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74ABT573 Rev. 1.4
5
DC Electrical Characteristics
SOIC package.
Notes:
5. Max number of outputs defined as (n). n – 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but
not tested.
6. Max number of outputs defined as (n). n – 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not
tested.
7. Max number of data inputs (n) switching. n – 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold
(VILD), 0V to threshold (VIHD). Guaranteed, but not tested.
AC Electrical Characteristics
SOIC and SSOP package.
Symbol
Parameter
VCC
Conditions
CL = 50pF,
RL = 500Ω
Min.
Typ.
Max.
Units
VOLP
Quiet Output Maximum Dynamic
VOL
5.0
TA = 25°C
(5)
0.7
1.0
V
VOLV
Quiet Output Minimum Dynamic VOL
5.0
TA = 25°C
(5)
–1.5
–1.2
V
VOHV
Minimum HIGH Level Dynamic
Output Voltage
5.0
TA = 25°C
(6)
2.5
3.0
V
VIHD
Minimum HIGH Level Dynamic Input
Voltage
5.0
TA = 25°C
(7)
2.2
1.8
V
VILD
Maximum LOW Level Dynamic
Input Voltage
5.0
TA = 25°C
(7)
1.0
0.7
V
Symbol
Parameter
TA = +25°C,
VCC = +5.0V,
CL = 50pF
TA = –40°C to +85°C,
VCC = 4.5V to 5.5V,
CL = 50pF
Units
Min.
Typ.
Max.
Min.
Max.
tPLH
Propagation Delay, Dn to On
1.9
2.7
4.5
1.9
4.5
ns
tPHL
1.9
2.8
4.5
1.9
4.5
tPLH
Propagation Delay, LE to On
2.0
3.1
5.0
2.0
5.0
ns
tPHL
2.0
3.0
5.0
2.0
5.0
tPZH
Output Enable Time
1.5
3.1
5.3
1.5
5.3
ns
tPZL
1.5
3.1
5.3
1.5
5.3
tPHZ
Output Disable Time
2.0
3.6
5.4
2.0
5.4
ns
tPLZ
2.0
3.4
5.4
2.0
5.4


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